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| author | Cameron Zwarich <zwarich@apple.com> | 2011-02-24 10:00:25 +0000 |
|---|---|---|
| committer | Cameron Zwarich <zwarich@apple.com> | 2011-02-24 10:00:25 +0000 |
| commit | 8ca814c4e0a39e1fcac023f0fb014917da07a796 (patch) | |
| tree | eaf3b0bf8577f6d22de6532276a3e8333ae0c1bb /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | |
| parent | 9b6af8de58140566a0e6567508bf906027422e7c (diff) | |
| download | llvm-8ca814c4e0a39e1fcac023f0fb014917da07a796.tar.gz llvm-8ca814c4e0a39e1fcac023f0fb014917da07a796.tar.bz2 llvm-8ca814c4e0a39e1fcac023f0fb014917da07a796.tar.xz | |
Merge information about the number of zero, one, and sign bits of live-out
registers at phis. This enables us to eliminate a lot of pointless zexts during
the DAGCombine phase. This fixes <rdar://problem/8760114>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126380 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index d540063083..68ba966d26 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -842,7 +842,12 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) { } } - if (!AllPredsVisited) { + if (AllPredsVisited) { + for (BasicBlock::const_iterator I = LLVMBB->begin(), E = LLVMBB->end(); + I != E && isa<PHINode>(I); ++I) { + FuncInfo->ComputePHILiveOutRegInfo(cast<PHINode>(I)); + } + } else { for (BasicBlock::const_iterator I = LLVMBB->begin(), E = LLVMBB->end(); I != E && isa<PHINode>(I); ++I) { FuncInfo->InvalidatePHILiveOutRegInfo(cast<PHINode>(I)); |