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| author | Nadav Rotem <nadav.rotem@intel.com> | 2011-05-18 12:26:38 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-05-18 12:26:38 +0000 |
| commit | fe3f5d7538954474731dbbed70430016600fa477 (patch) | |
| tree | b6baca5d8c52263cb3b25e8449340c58398e200a /lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
| parent | 7016ec1a458bd39decbe4573cc3d53eb4b736c75 (diff) | |
| download | llvm-fe3f5d7538954474731dbbed70430016600fa477.tar.gz llvm-fe3f5d7538954474731dbbed70430016600fa477.tar.bz2 llvm-fe3f5d7538954474731dbbed70430016600fa477.tar.xz | |
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131534 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index b301e3bd3d..378e207cc7 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -892,7 +892,7 @@ unsigned TargetLowering::getVectorTypeBreakdown(LLVMContext &Context, EVT VT, // If there is a wider vector type with the same element type as this one, // we should widen to that legal vector type. This handles things like // <2 x float> -> <4 x float>. - if (NumElts != 1 && getTypeAction(VT) == Promote) { + if (NumElts != 1 && getTypeAction(Context, VT) == Promote) { RegisterVT = getTypeToTransformTo(Context, VT); if (isTypeLegal(RegisterVT)) { IntermediateVT = RegisterVT; |