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| author | Pete Cooper <peter_cooper@apple.com> | 2011-11-15 21:57:53 +0000 |
|---|---|---|
| committer | Pete Cooper <peter_cooper@apple.com> | 2011-11-15 21:57:53 +0000 |
| commit | 2d496897934adfc0e3e1563dd64d9a7122971e22 (patch) | |
| tree | e63b4cee0327fb0cde543e738584cff21493929e /lib/CodeGen/SelectionDAG | |
| parent | 5c984e451d604e3ff3cfdc5db7c0b6ca6be7a14f (diff) | |
| download | llvm-2d496897934adfc0e3e1563dd64d9a7122971e22.tar.gz llvm-2d496897934adfc0e3e1563dd64d9a7122971e22.tar.bz2 llvm-2d496897934adfc0e3e1563dd64d9a7122971e22.tar.xz | |
Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used
by later instructions.
Only done for DEC64m right now.
Fixes <rdar://problem/6172640>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144705 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 7938a37505..5adbc0d6aa 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -948,6 +948,11 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) { if (!TII->unfoldMemoryOperand(*DAG, N, NewNodes)) return NULL; + // unfolding an x86 DEC64m operation results in store, dec, load which + // can't be handled here so quit + if (NewNodes.size() == 3) + return NULL; + DEBUG(dbgs() << "Unfolding SU #" << SU->NodeNum << "\n"); assert(NewNodes.size() == 2 && "Expected a load folding node!"); |