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authorChad Rosier <mcrosier@codeaurora.org>2014-06-27 21:05:09 +0000
committerChad Rosier <mcrosier@codeaurora.org>2014-06-27 21:05:09 +0000
commitd7be29696dc4dc88c8c0a39ac8cfa8e3da24cb77 (patch)
tree6b43f75524e412b869b7836a9062d26cbb5fd122 /lib/CodeGen/SelectionDAG
parent1cfa342dc1fd6fd498652d67311c3632893512b3 (diff)
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[AArch64] Fix memset ICE when memset value is f128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211960 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 522d7c535d..4aad5dcfc4 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3631,7 +3631,7 @@ static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
if (Str.empty()) {
if (VT.isInteger())
return DAG.getConstant(0, VT);
- else if (VT == MVT::f32 || VT == MVT::f64)
+ else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
return DAG.getConstantFP(0.0, VT);
else if (VT.isVector()) {
unsigned NumElts = VT.getVectorNumElements();