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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-04-20 22:14:17 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-04-20 22:14:17 +0000
commit08c5a347a05e73a34c70ec8b694b1e89b96a6bf5 (patch)
treea76fa657c38bf7451d29d6191c8a1c8f91c02221 /lib/CodeGen/TargetInstrInfoImpl.cpp
parent344731c01805aeda49c747bac6148501fa85557c (diff)
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Permit remat when a virtual register has multiple defs.
TII::isTriviallyReMaterializable() shouldn't depend on any properties of the register being defined by the instruction. Rematerialization is going to create a new virtual register anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129882 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/TargetInstrInfoImpl.cpp')
-rw-r--r--lib/CodeGen/TargetInstrInfoImpl.cpp5
1 files changed, 0 insertions, 5 deletions
diff --git a/lib/CodeGen/TargetInstrInfoImpl.cpp b/lib/CodeGen/TargetInstrInfoImpl.cpp
index 15340a3f10..b9fcd3804d 100644
--- a/lib/CodeGen/TargetInstrInfoImpl.cpp
+++ b/lib/CodeGen/TargetInstrInfoImpl.cpp
@@ -388,11 +388,6 @@ isReallyTriviallyReMaterializableGeneric(const MachineInstr *MI,
if (MO.isDef() != (i == 0))
return false;
- // For the def, it should be the only def of that register.
- if (MO.isDef() && (llvm::next(MRI.def_begin(Reg)) != MRI.def_end() ||
- MRI.isLiveIn(Reg)))
- return false;
-
// Don't allow any virtual-register uses. Rematting an instruction with
// virtual register uses would length the live ranges of the uses, which
// is not necessarily a good idea, certainly not "trivial".