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| author | Andrew Trick <atrick@apple.com> | 2012-06-29 03:23:18 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-06-29 03:23:18 +0000 |
| commit | 0d9513c74f3e4c019406273cce49e43508dc4dcf (patch) | |
| tree | c8d68e40177c130f1a1e1e84f1d07e37c0d0fd39 /lib/CodeGen/TargetInstrInfoImpl.cpp | |
| parent | 40307c7dbe2d104784763c28697d7926793674af (diff) | |
| download | llvm-0d9513c74f3e4c019406273cce49e43508dc4dcf.tar.gz llvm-0d9513c74f3e4c019406273cce49e43508dc4dcf.tar.bz2 llvm-0d9513c74f3e4c019406273cce49e43508dc4dcf.tar.xz | |
Make NumMicroOps a variable in the subtarget's instruction itinerary.
The TargetInstrInfo::getNumMicroOps API does not change, but soon it
will be used by MachineScheduler. Now each subtarget can specify the
number of micro-ops per itinerary class. For ARM, this is currently
always dynamic (-1), because it is used for load/store multiple which
depends on the number of register operands.
Zero is now a valid number of micro-ops. This can be used for
nop pseudo-instructions or instructions that the hardware can squash
during dispatch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159406 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/TargetInstrInfoImpl.cpp')
| -rw-r--r-- | lib/CodeGen/TargetInstrInfoImpl.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/TargetInstrInfoImpl.cpp b/lib/CodeGen/TargetInstrInfoImpl.cpp index 7af08f591f..54be88a8bb 100644 --- a/lib/CodeGen/TargetInstrInfoImpl.cpp +++ b/lib/CodeGen/TargetInstrInfoImpl.cpp @@ -560,8 +560,8 @@ TargetInstrInfoImpl::getNumMicroOps(const InstrItineraryData *ItinData, return 1; unsigned Class = MI->getDesc().getSchedClass(); - unsigned UOps = ItinData->Itineraries[Class].NumMicroOps; - if (UOps) + int UOps = ItinData->Itineraries[Class].NumMicroOps; + if (UOps >= 0) return UOps; // The # of u-ops is dynamically determined. The specific target should |