Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance.

Print virtual registers numbered from 0 instead of the arbitrary
FirstVirtualRegister. The first virtual register is printed as %vreg0.
TRI::NoRegister is printed as %noreg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123107 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 4 insertions, 8 deletions

diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index b44df47411..bc295ef30c 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -263,20 +263,16 @@ void VirtRegMap::print(raw_ostream &OS, const Module* M) const {
   for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
     unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
     if (Virt2PhysMap[Reg] != (unsigned)VirtRegMap::NO_PHYS_REG) {
-      OS << '[';
-      TRI->printReg(Reg, OS);
-      OS << " -> ";
-      TRI->printReg(Virt2PhysMap[Reg], OS);
-      OS << "] " << MRI.getRegClass(i)->getName() << "\n";
+      OS << '[' << PrintReg(Reg, TRI) << " -> "
+         << PrintReg(Virt2PhysMap[Reg], TRI) << "] "
+         << MRI.getRegClass(Reg)->getName() << "\n";
     }
   }
 
   for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
     unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
     if (Virt2StackSlotMap[Reg] != VirtRegMap::NO_STACK_SLOT) {
-      OS << '[';
-      TRI->printReg(Reg, OS);
-      OS << " -> fi#" << Virt2StackSlotMap[Reg]
+      OS << '[' << PrintReg(Reg, TRI) << " -> fi#" << Virt2StackSlotMap[Reg]
          << "] " << MRI.getRegClass(Reg)->getName() << "\n";
     }
   }