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authorEvan Cheng <evan.cheng@apple.com>2009-06-14 20:22:55 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-06-14 20:22:55 +0000
commit90f95f88c6ce09c6744777dc9d140c3c77203b92 (patch)
tree3996a490bf685eea1de9b1579d28f69500dbf8a6 /lib/CodeGen/VirtRegMap.cpp
parentcaf6b2bbaf40580596e974b5eee0a7e59b58bd98 (diff)
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Move register allocation preference (or hint) from LiveInterval to MachineRegisterInfo. This allows more passes to set them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73346 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/VirtRegMap.cpp')
-rw-r--r--lib/CodeGen/VirtRegMap.cpp37
1 files changed, 35 insertions, 2 deletions
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 29637b954f..87d75dd006 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -51,6 +51,7 @@ static RegisterPass<VirtRegMap>
X("virtregmap", "Virtual Register Map");
bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) {
+ MRI = &mf.getRegInfo();
TII = mf.getTarget().getInstrInfo();
TRI = mf.getTarget().getRegisterInfo();
MF = &mf;
@@ -98,6 +99,39 @@ void VirtRegMap::grow() {
ImplicitDefed.resize(LastVirtReg-TargetRegisterInfo::FirstVirtualRegister+1);
}
+unsigned VirtRegMap::getRegAllocPref(unsigned virtReg) {
+ std::pair<MachineRegisterInfo::RegAllocHintType, unsigned> Hint =
+ MRI->getRegAllocationHint(virtReg);
+ switch (Hint.first) {
+ default: assert(0);
+ case MachineRegisterInfo::RA_None:
+ return 0;
+ case MachineRegisterInfo::RA_Preference:
+ if (TargetRegisterInfo::isPhysicalRegister(Hint.second))
+ return Hint.second;
+ if (hasPhys(Hint.second))
+ return getPhys(Hint.second);
+ case MachineRegisterInfo::RA_PairEven: {
+ unsigned physReg = Hint.second;
+ if (TargetRegisterInfo::isPhysicalRegister(physReg))
+ return TRI->getRegisterPairEven(*MF, physReg);
+ else if (hasPhys(physReg))
+ return TRI->getRegisterPairEven(*MF, getPhys(physReg));
+ return 0;
+ }
+ case MachineRegisterInfo::RA_PairOdd: {
+ unsigned physReg = Hint.second;
+ if (TargetRegisterInfo::isPhysicalRegister(physReg))
+ return TRI->getRegisterPairOdd(*MF, physReg);
+ else if (hasPhys(physReg))
+ return TRI->getRegisterPairOdd(*MF, getPhys(physReg));
+ return 0;
+ }
+ }
+ // Shouldn't reach here.
+ return 0;
+}
+
int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
assert(TargetRegisterInfo::isVirtualRegister(virtReg));
assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
@@ -213,8 +247,7 @@ void VirtRegMap::RemoveMachineInstrFromMaps(MachineInstr *MI) {
/// FindUnusedRegisters - Gather a list of allocatable registers that
/// have not been allocated to any virtual register.
-bool VirtRegMap::FindUnusedRegisters(const TargetRegisterInfo *TRI,
- LiveIntervals* LIs) {
+bool VirtRegMap::FindUnusedRegisters(LiveIntervals* LIs) {
unsigned NumRegs = TRI->getNumRegs();
UnusedRegs.reset();
UnusedRegs.resize(NumRegs);