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authorEvan Cheng <evan.cheng@apple.com>2008-02-22 19:22:06 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-02-22 19:22:06 +0000
commitb2fd65f936292f4dcd5ef5ee62175552779c1c82 (patch)
treeb36d4427eefff9702d4adad2e45ecde6ac12f31d /lib/CodeGen/VirtRegMap.cpp
parent5f2e4681ce039f29d75fae2d8447e4a31b8e4706 (diff)
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Make sure reload of implicit uses are issued before remat's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47492 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/VirtRegMap.cpp')
-rw-r--r--lib/CodeGen/VirtRegMap.cpp18
1 files changed, 15 insertions, 3 deletions
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 0f2b9bba88..227ac0c738 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -1040,7 +1040,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
/// ReusedOperands - Keep track of operand reuse in case we need to undo
/// reuse.
ReuseInfo ReusedOperands(MI, TRI);
- // Process all of the spilled uses and all non spilled reg references.
+ SmallVector<unsigned, 4> VirtUseOps;
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI.getOperand(i);
if (!MO.isRegister() || MO.getReg() == 0)
@@ -1053,9 +1053,21 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
RegInfo->setPhysRegUsed(VirtReg);
continue;
}
-
+
+ // We want to process implicit virtual register uses first.
+ if (MO.isImplicit())
+ VirtUseOps.insert(VirtUseOps.begin(), i);
+ else
+ VirtUseOps.push_back(i);
+ }
+
+ // Process all of the spilled uses and all non spilled reg references.
+ for (unsigned j = 0, e = VirtUseOps.size(); j != e; ++j) {
+ unsigned i = VirtUseOps[j];
+ MachineOperand &MO = MI.getOperand(i);
+ unsigned VirtReg = MO.getReg();
assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
- "Not a virtual or a physical register?");
+ "Not a virtual register?");
unsigned SubIdx = MO.getSubReg();
if (VRM.isAssignedReg(VirtReg)) {