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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-01-10 02:58:51 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-01-10 02:58:51 +0000
commitc9df025e33ac435adb3b3318d237c36ca7cec659 (patch)
tree80a9dfcbb33fcfa3fbfdff2b2f9e6ba80ed170fc /lib/CodeGen/VirtRegMap.cpp
parentfdc8f2d2604877d80f64e309d4b03ea67addf037 (diff)
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Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/VirtRegMap.cpp')
-rw-r--r--lib/CodeGen/VirtRegMap.cpp5
1 files changed, 2 insertions, 3 deletions
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index df8a021d14..82c64f36d5 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -115,11 +115,10 @@ unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) {
unsigned VirtRegMap::getRegAllocPref(unsigned virtReg) {
std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(virtReg);
unsigned physReg = Hint.second;
- if (physReg &&
- TargetRegisterInfo::isVirtualRegister(physReg) && hasPhys(physReg))
+ if (TargetRegisterInfo::isVirtualRegister(physReg) && hasPhys(physReg))
physReg = getPhys(physReg);
if (Hint.first == 0)
- return (physReg && TargetRegisterInfo::isPhysicalRegister(physReg))
+ return (TargetRegisterInfo::isPhysicalRegister(physReg))
? physReg : 0;
return TRI->ResolveRegAllocHint(Hint.first, physReg, *MF);
}