diff options
| author | Jim Grosbach <grosbach@apple.com> | 2010-07-27 17:38:47 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-07-27 17:38:47 +0000 |
| commit | 57cb4f8be1b6dcac5e504d82c8b2a911909f2deb (patch) | |
| tree | f0997600ec1747c4441bf85d97126ddbb238d891 /lib/CodeGen/VirtRegRewriter.cpp | |
| parent | ae64eedae2531b8c0cbd2d8a415cffa3cd33cb13 (diff) | |
| download | llvm-57cb4f8be1b6dcac5e504d82c8b2a911909f2deb.tar.gz llvm-57cb4f8be1b6dcac5e504d82c8b2a911909f2deb.tar.bz2 llvm-57cb4f8be1b6dcac5e504d82c8b2a911909f2deb.tar.xz | |
80 column
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109513 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/VirtRegRewriter.cpp')
| -rw-r--r-- | lib/CodeGen/VirtRegRewriter.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/CodeGen/VirtRegRewriter.cpp b/lib/CodeGen/VirtRegRewriter.cpp index fc2498d2c8..131ebd1146 100644 --- a/lib/CodeGen/VirtRegRewriter.cpp +++ b/lib/CodeGen/VirtRegRewriter.cpp @@ -460,7 +460,7 @@ public: /// blocks each of which is a successor of the specified BB and has no other /// predecessor. static void findSinglePredSuccessor(MachineBasicBlock *MBB, - SmallVectorImpl<MachineBasicBlock *> &Succs) { + SmallVectorImpl<MachineBasicBlock *> &Succs){ for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(), SE = MBB->succ_end(); SI != SE; ++SI) { MachineBasicBlock *SuccMBB = *SI; @@ -852,8 +852,8 @@ unsigned ReuseInfo::GetRegForReload(const TargetRegisterClass *RC, // Yup, use the reload register that we didn't use before. unsigned NewReg = Op.AssignedPhysReg; Rejected.insert(PhysReg); - return GetRegForReload(RC, NewReg, MF, MI, Spills, MaybeDeadStores, Rejected, - RegKills, KillOps, VRM); + return GetRegForReload(RC, NewReg, MF, MI, Spills, MaybeDeadStores, + Rejected, RegKills, KillOps, VRM); } else { // Otherwise, we might also have a problem if a previously reused // value aliases the new register. If so, codegen the previous reload @@ -2302,7 +2302,7 @@ LocalRewriter::RewriteMBB(LiveIntervals *LIs, unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS); SmallVector<MachineInstr*, 4> NewMIs; if (PhysReg && - TII->unfoldMemoryOperand(MF, &MI, PhysReg, false, false, NewMIs)) { + TII->unfoldMemoryOperand(MF, &MI, PhysReg, false, false, NewMIs)){ MBB->insert(MII, NewMIs[0]); InvalidateKills(MI, TRI, RegKills, KillOps); VRM->RemoveMachineInstrFromMaps(&MI); |