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authorEvan Cheng <evan.cheng@apple.com>2008-09-20 01:28:05 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-09-20 01:28:05 +0000
commit5e8d9def77b4a68e6be32f21cda28d2a451267a9 (patch)
treee4c5bff945b84a35c2bb29268428066b37410340 /lib/CodeGen
parent4070e60efecb521e1badfbc0fd78840a62ce8450 (diff)
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Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56381 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r--lib/CodeGen/RegAllocLinearScan.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 000dd41b97..df9d393a8f 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -855,9 +855,12 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
// All registers must have inf weight. Just grab one!
minReg = BestPhysReg ? BestPhysReg : *RC->allocation_order_begin(*mf_);
if (cur->weight == HUGE_VALF ||
- li_->getApproximateInstructionCount(*cur) == 0)
+ li_->getApproximateInstructionCount(*cur) == 0) {
// Spill a physical register around defs and uses.
li_->spillPhysRegAroundRegDefsUses(*cur, minReg, *vrm_);
+ assignRegOrStackSlotAtInterval(cur);
+ return;
+ }
}
// Find up to 3 registers to consider as spill candidates.