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author | Craig Topper <craig.topper@gmail.com> | 2014-03-02 09:09:27 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2014-03-02 09:09:27 +0000 |
commit | 629b96cb4f278cc78bfd5679e91315cb6e1ed164 (patch) | |
tree | ed28168bcd1081616aad52528cbc43a757a2e29f /lib/CodeGen | |
parent | cfbdd4df6ddc1adff339c71dcd9731f93c5e1768 (diff) | |
download | llvm-629b96cb4f278cc78bfd5679e91315cb6e1ed164.tar.gz llvm-629b96cb4f278cc78bfd5679e91315cb6e1ed164.tar.bz2 llvm-629b96cb4f278cc78bfd5679e91315cb6e1ed164.tar.xz |
Switch all uses of LLVM_OVERRIDE to just use 'override' directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202621 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/AsmPrinter/DwarfUnit.h | 8 | ||||
-rw-r--r-- | lib/CodeGen/BasicTargetTransformInfo.cpp | 58 | ||||
-rw-r--r-- | lib/CodeGen/MachineScheduler.cpp | 34 |
3 files changed, 50 insertions, 50 deletions
diff --git a/lib/CodeGen/AsmPrinter/DwarfUnit.h b/lib/CodeGen/AsmPrinter/DwarfUnit.h index f92b0852c8..c87f2bd15d 100644 --- a/lib/CodeGen/AsmPrinter/DwarfUnit.h +++ b/lib/CodeGen/AsmPrinter/DwarfUnit.h @@ -573,7 +573,7 @@ public: /// either DW_FORM_addr or DW_FORM_GNU_addr_index. void addLabelAddress(DIE *Die, dwarf::Attribute Attribute, MCSymbol *Label); - DwarfCompileUnit &getCU() LLVM_OVERRIDE { return *this; } + DwarfCompileUnit &getCU() override { return *this; } }; class DwarfTypeUnit : public DwarfUnit { @@ -592,13 +592,13 @@ public: /// Emit the header for this unit, not including the initial length field. void emitHeader(const MCSection *ASection, const MCSymbol *ASectionSym) const - LLVM_OVERRIDE; - unsigned getHeaderSize() const LLVM_OVERRIDE { + override; + unsigned getHeaderSize() const override { return DwarfUnit::getHeaderSize() + sizeof(uint64_t) + // Type Signature sizeof(uint32_t); // Type DIE Offset } void initSection(const MCSection *Section); - DwarfCompileUnit &getCU() LLVM_OVERRIDE { return CU; } + DwarfCompileUnit &getCU() override { return CU; } }; } // end llvm namespace #endif diff --git a/lib/CodeGen/BasicTargetTransformInfo.cpp b/lib/CodeGen/BasicTargetTransformInfo.cpp index c12a90d1f7..003f4c4c9e 100644 --- a/lib/CodeGen/BasicTargetTransformInfo.cpp +++ b/lib/CodeGen/BasicTargetTransformInfo.cpp @@ -43,7 +43,7 @@ public: initializeBasicTTIPass(*PassRegistry::getPassRegistry()); } - virtual void initializePass() LLVM_OVERRIDE { + virtual void initializePass() override { pushTTIStack(this); } @@ -51,7 +51,7 @@ public: popTTIStack(); } - virtual void getAnalysisUsage(AnalysisUsage &AU) const LLVM_OVERRIDE { + virtual void getAnalysisUsage(AnalysisUsage &AU) const override { TargetTransformInfo::getAnalysisUsage(AU); } @@ -59,64 +59,64 @@ public: static char ID; /// Provide necessary pointer adjustments for the two base classes. - virtual void *getAdjustedAnalysisPointer(const void *ID) LLVM_OVERRIDE { + virtual void *getAdjustedAnalysisPointer(const void *ID) override { if (ID == &TargetTransformInfo::ID) return (TargetTransformInfo*)this; return this; } - virtual bool hasBranchDivergence() const LLVM_OVERRIDE; + virtual bool hasBranchDivergence() const override; /// \name Scalar TTI Implementations /// @{ - virtual bool isLegalAddImmediate(int64_t imm) const LLVM_OVERRIDE; - virtual bool isLegalICmpImmediate(int64_t imm) const LLVM_OVERRIDE; + virtual bool isLegalAddImmediate(int64_t imm) const override; + virtual bool isLegalICmpImmediate(int64_t imm) const override; virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, - int64_t Scale) const LLVM_OVERRIDE; + int64_t Scale) const override; virtual int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, - int64_t Scale) const LLVM_OVERRIDE; - virtual bool isTruncateFree(Type *Ty1, Type *Ty2) const LLVM_OVERRIDE; - virtual bool isTypeLegal(Type *Ty) const LLVM_OVERRIDE; - virtual unsigned getJumpBufAlignment() const LLVM_OVERRIDE; - virtual unsigned getJumpBufSize() const LLVM_OVERRIDE; - virtual bool shouldBuildLookupTables() const LLVM_OVERRIDE; - virtual bool haveFastSqrt(Type *Ty) const LLVM_OVERRIDE; + int64_t Scale) const override; + virtual bool isTruncateFree(Type *Ty1, Type *Ty2) const override; + virtual bool isTypeLegal(Type *Ty) const override; + virtual unsigned getJumpBufAlignment() const override; + virtual unsigned getJumpBufSize() const override; + virtual bool shouldBuildLookupTables() const override; + virtual bool haveFastSqrt(Type *Ty) const override; virtual void getUnrollingPreferences( - Loop *L, UnrollingPreferences &UP) const LLVM_OVERRIDE; + Loop *L, UnrollingPreferences &UP) const override; /// @} /// \name Vector TTI Implementations /// @{ - virtual unsigned getNumberOfRegisters(bool Vector) const LLVM_OVERRIDE; - virtual unsigned getMaximumUnrollFactor() const LLVM_OVERRIDE; - virtual unsigned getRegisterBitWidth(bool Vector) const LLVM_OVERRIDE; + virtual unsigned getNumberOfRegisters(bool Vector) const override; + virtual unsigned getMaximumUnrollFactor() const override; + virtual unsigned getRegisterBitWidth(bool Vector) const override; virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind, - OperandValueKind) const LLVM_OVERRIDE; + OperandValueKind) const override; virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp, - int Index, Type *SubTp) const LLVM_OVERRIDE; + int Index, Type *SubTp) const override; virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst, - Type *Src) const LLVM_OVERRIDE; - virtual unsigned getCFInstrCost(unsigned Opcode) const LLVM_OVERRIDE; + Type *Src) const override; + virtual unsigned getCFInstrCost(unsigned Opcode) const override; virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, - Type *CondTy) const LLVM_OVERRIDE; + Type *CondTy) const override; virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) const LLVM_OVERRIDE; + unsigned Index) const override; virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, - unsigned AddressSpace) const LLVM_OVERRIDE; + unsigned AddressSpace) const override; virtual unsigned getIntrinsicInstrCost( - Intrinsic::ID, Type *RetTy, ArrayRef<Type*> Tys) const LLVM_OVERRIDE; - virtual unsigned getNumberOfParts(Type *Tp) const LLVM_OVERRIDE; + Intrinsic::ID, Type *RetTy, ArrayRef<Type*> Tys) const override; + virtual unsigned getNumberOfParts(Type *Tp) const override; virtual unsigned getAddressComputationCost( - Type *Ty, bool IsComplex) const LLVM_OVERRIDE; + Type *Ty, bool IsComplex) const override; virtual unsigned getReductionCost(unsigned Opcode, Type *Ty, - bool IsPairwise) const LLVM_OVERRIDE; + bool IsPairwise) const override; /// @} }; diff --git a/lib/CodeGen/MachineScheduler.cpp b/lib/CodeGen/MachineScheduler.cpp index beb724342e..f10a471d66 100644 --- a/lib/CodeGen/MachineScheduler.cpp +++ b/lib/CodeGen/MachineScheduler.cpp @@ -2454,27 +2454,27 @@ public: virtual void initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, - unsigned NumRegionInstrs) LLVM_OVERRIDE; + unsigned NumRegionInstrs) override; - virtual bool shouldTrackPressure() const LLVM_OVERRIDE { + virtual bool shouldTrackPressure() const override { return RegionPolicy.ShouldTrackPressure; } - virtual void initialize(ScheduleDAGMI *dag) LLVM_OVERRIDE; + virtual void initialize(ScheduleDAGMI *dag) override; - virtual SUnit *pickNode(bool &IsTopNode) LLVM_OVERRIDE; + virtual SUnit *pickNode(bool &IsTopNode) override; - virtual void schedNode(SUnit *SU, bool IsTopNode) LLVM_OVERRIDE; + virtual void schedNode(SUnit *SU, bool IsTopNode) override; - virtual void releaseTopNode(SUnit *SU) LLVM_OVERRIDE { + virtual void releaseTopNode(SUnit *SU) override { Top.releaseTopNode(SU); } - virtual void releaseBottomNode(SUnit *SU) LLVM_OVERRIDE { + virtual void releaseBottomNode(SUnit *SU) override { Bot.releaseBottomNode(SU); } - virtual void registerRoots() LLVM_OVERRIDE; + virtual void registerRoots() override; protected: void checkAcyclicLatency(); @@ -3047,14 +3047,14 @@ public: virtual void initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, - unsigned NumRegionInstrs) LLVM_OVERRIDE { + unsigned NumRegionInstrs) override { /* no configurable policy */ }; /// PostRA scheduling does not track pressure. - virtual bool shouldTrackPressure() const LLVM_OVERRIDE { return false; } + virtual bool shouldTrackPressure() const override { return false; } - virtual void initialize(ScheduleDAGMI *Dag) LLVM_OVERRIDE { + virtual void initialize(ScheduleDAGMI *Dag) override { DAG = Dag; SchedModel = DAG->getSchedModel(); TRI = DAG->TRI; @@ -3073,22 +3073,22 @@ public: } } - virtual void registerRoots() LLVM_OVERRIDE; + virtual void registerRoots() override; - virtual SUnit *pickNode(bool &IsTopNode) LLVM_OVERRIDE; + virtual SUnit *pickNode(bool &IsTopNode) override; - virtual void scheduleTree(unsigned SubtreeID) LLVM_OVERRIDE { + virtual void scheduleTree(unsigned SubtreeID) override { llvm_unreachable("PostRA scheduler does not support subtree analysis."); } - virtual void schedNode(SUnit *SU, bool IsTopNode) LLVM_OVERRIDE; + virtual void schedNode(SUnit *SU, bool IsTopNode) override; - virtual void releaseTopNode(SUnit *SU) LLVM_OVERRIDE { + virtual void releaseTopNode(SUnit *SU) override { Top.releaseTopNode(SU); } // Only called for roots. - virtual void releaseBottomNode(SUnit *SU) LLVM_OVERRIDE { + virtual void releaseBottomNode(SUnit *SU) override { BotRoots.push_back(SU); } |