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author | Andrew Trick <atrick@apple.com> | 2011-09-20 18:22:31 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2011-09-20 18:22:31 +0000 |
commit | 83a8031336a1155e6b0c3e9a84164324e08d1c8b (patch) | |
tree | cfefdf37afe51d34e6b53f9581dbe129f5f74606 /lib/CodeGen | |
parent | f83f0f8246457bf7951bc95dd74ec67cf524b845 (diff) | |
download | llvm-83a8031336a1155e6b0c3e9a84164324e08d1c8b.tar.gz llvm-83a8031336a1155e6b0c3e9a84164324e08d1c8b.tar.bz2 llvm-83a8031336a1155e6b0c3e9a84164324e08d1c8b.tar.xz |
Restore hasPostISelHook tblgen flag.
No functionality change. The hook makes it explicit which patterns
require "special" handling. i.e. it self-documents tblgen
deficiencies. I plan to add verification in ExpandISelPseudos and
Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's
too fragile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140160 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 3 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 7 |
2 files changed, 8 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp index eebf2b2f69..e2e906afa6 100644 --- a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp +++ b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp @@ -763,7 +763,8 @@ EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned, } // Run post-isel target hook to adjust this instruction if needed. - TLI->AdjustInstrPostInstrSelection(MI, Node); + if (II.hasPostISelHook()) + TLI->AdjustInstrPostInstrSelection(MI, Node); } /// EmitSpecialNode - Generate machine code for a target-independent node and diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 9f2369d142..b684619776 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -179,7 +179,12 @@ TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, SDNode *Node) const { - // Do nothing unless the target overrides it. +#ifndef NDEBUG + dbgs() << "If a target marks an instruction with " + "'hasPostISelHook', it must implement " + "TargetLowering::AdjustInstrPostInstrSelection!"; +#endif + llvm_unreachable(0); } //===----------------------------------------------------------------------===// |