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| author | Hal Finkel <hfinkel@anl.gov> | 2014-01-02 21:38:26 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2014-01-02 21:38:26 +0000 |
| commit | d151389bd1909103ae3063bf470eb4d44abab468 (patch) | |
| tree | 928ed488ca4767be5aecec43dfdc1e6f619af84e /lib/CodeGen | |
| parent | 628dca146eb20a652704d475e41af75eb9b28a44 (diff) | |
| download | llvm-d151389bd1909103ae3063bf470eb4d44abab468.tar.gz llvm-d151389bd1909103ae3063bf470eb4d44abab468.tar.bz2 llvm-d151389bd1909103ae3063bf470eb4d44abab468.tar.xz | |
[PPC] Fix the scheduling of CR logicals on the P7
CR logicals (crand, crxor, etc.) on the P7 need to be in the first slot of each
dispatch group. The old itinerary entry was just wrong (but has not mattered
because we don't generate these instructions).
This will matter when, in an upcoming commit, we start generating these
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198359 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
0 files changed, 0 insertions, 0 deletions