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author | Hal Finkel <hfinkel@anl.gov> | 2014-03-26 04:55:40 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2014-03-26 04:55:40 +0000 |
commit | 360ee971798ebccc177f7e1c2947a74e3bd9fbc0 (patch) | |
tree | 027dc0bbbca6c27bbb6bc4994b5fd7fe8dd470b4 /lib/IR/Verifier.cpp | |
parent | 33845aa8c489e52e6287c75356daa8dd04b87350 (diff) | |
download | llvm-360ee971798ebccc177f7e1c2947a74e3bd9fbc0.tar.gz llvm-360ee971798ebccc177f7e1c2947a74e3bd9fbc0.tar.bz2 llvm-360ee971798ebccc177f7e1c2947a74e3bd9fbc0.tar.xz |
[PowerPC] Generate logical vector VSX instructions
These instructions are essentially the same as their Altivec counterparts, but
have access to the larger VSX register file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204782 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/IR/Verifier.cpp')
0 files changed, 0 insertions, 0 deletions