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| author | Craig Topper <craig.topper@gmail.com> | 2014-06-18 05:05:13 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2014-06-18 05:05:13 +0000 |
| commit | 10d664fee72917960c8bf38cc2ec8e3b84924044 (patch) | |
| tree | 6c0535956bcc25ed20dfde3f2063548a9ec34a82 /lib/Target/AArch64/AArch64ISelLowering.cpp | |
| parent | 868e579be6c533836731500b47fc6d6d2e8e5314 (diff) | |
| download | llvm-10d664fee72917960c8bf38cc2ec8e3b84924044.tar.gz llvm-10d664fee72917960c8bf38cc2ec8e3b84924044.tar.bz2 llvm-10d664fee72917960c8bf38cc2ec8e3b84924044.tar.xz | |
Replace some assert(0)'s with llvm_unreachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211141 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AArch64/AArch64ISelLowering.cpp')
| -rw-r--r-- | lib/Target/AArch64/AArch64ISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp index 7a2c9c95b6..ec10968874 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -1273,7 +1273,7 @@ static SDValue LowerADDC_ADDE_SUBC_SUBE(SDValue Op, SelectionDAG &DAG) { bool ExtraOp = false; switch (Op.getOpcode()) { default: - assert(0 && "Invalid code"); + llvm_unreachable("Invalid code"); case ISD::ADDC: Opc = AArch64ISD::ADDS; break; @@ -6674,7 +6674,7 @@ static SDValue tryCombineFixedPointConvert(SDNode *N, else if (Vec.getValueType() == MVT::v2i64) VecResTy = MVT::v2f64; else - assert(0 && "unexpected vector type!"); + llvm_unreachable("unexpected vector type!"); SDValue Convert = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VecResTy, IID, Vec, Shift); |