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| author | Hao Liu <Hao.Liu@arm.com> | 2013-10-10 17:00:52 +0000 |
|---|---|---|
| committer | Hao Liu <Hao.Liu@arm.com> | 2013-10-10 17:00:52 +0000 |
| commit | 6a5a667517160ca1b557002a29d08868ae029451 (patch) | |
| tree | ab7bac232ae99d6b321cad35b0d0a5d8fbd39fcf /lib/Target/AArch64/AArch64ISelLowering.h | |
| parent | 812ddcc50f8bc3ec6ce115863ff2263815906aaf (diff) | |
| download | llvm-6a5a667517160ca1b557002a29d08868ae029451.tar.gz llvm-6a5a667517160ca1b557002a29d08868ae029451.tar.bz2 llvm-6a5a667517160ca1b557002a29d08868ae029451.tar.xz | |
Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192361 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AArch64/AArch64ISelLowering.h')
| -rw-r--r-- | lib/Target/AArch64/AArch64ISelLowering.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/AArch64/AArch64ISelLowering.h b/lib/Target/AArch64/AArch64ISelLowering.h index 3e309a9556..da7f62361b 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.h +++ b/lib/Target/AArch64/AArch64ISelLowering.h @@ -281,6 +281,10 @@ public: std::pair<unsigned, const TargetRegisterClass*> getRegForInlineAsmConstraint(const std::string &Constraint, MVT VT) const; + + virtual bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, + unsigned Intrinsic) const LLVM_OVERRIDE; + private: const InstrItineraryData *Itins; |