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author | Tim Northover <tnorthover@apple.com> | 2014-03-07 10:24:44 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2014-03-07 10:24:44 +0000 |
commit | 69d2b2aa5a04a6a4e296517c9b9c5160a75b3b3b (patch) | |
tree | 175312832e675e33717136d4e130a3fe3083c6fa /lib/Target/AArch64/AArch64InstrNEON.td | |
parent | cd68cff830c88778ff01997565d6a776e9ed4194 (diff) | |
download | llvm-69d2b2aa5a04a6a4e296517c9b9c5160a75b3b3b.tar.gz llvm-69d2b2aa5a04a6a4e296517c9b9c5160a75b3b3b.tar.bz2 llvm-69d2b2aa5a04a6a4e296517c9b9c5160a75b3b3b.tar.xz |
InstCombine: form shuffles from wider range of insert/extractelements
Sequences of insertelement/extractelements are sometimes used to build
vectorsr; this code tries to put them back together into shuffles, but
could only produce a completely uniform shuffle types (<N x T> from two
<N x T> sources).
This should allow shuffles with different numbers of elements on the
input and output sides as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203229 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AArch64/AArch64InstrNEON.td')
-rw-r--r-- | lib/Target/AArch64/AArch64InstrNEON.td | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/lib/Target/AArch64/AArch64InstrNEON.td b/lib/Target/AArch64/AArch64InstrNEON.td index 233f404697..3b919b388b 100644 --- a/lib/Target/AArch64/AArch64InstrNEON.td +++ b/lib/Target/AArch64/AArch64InstrNEON.td @@ -3321,6 +3321,11 @@ multiclass NeonI_3VDL2_2Op_mull_v3<bit u, bits<4> opcode, string asmop, (i64 (vector_extract (v2i64 VPR128:$Rm), 1)))))))], NoItinerary>; } + + def : Pat<(v16i8 (int_aarch64_neon_vmull_p64 + (v1i64 (extract_subvector (v2i64 VPR128:$Rn), (i64 1))), + (v1i64 (extract_subvector (v2i64 VPR128:$Rm), (i64 1))))), + (!cast<Instruction>(NAME # "_1q2d") VPR128:$Rn, VPR128:$Rm)>; } defm PMULL2vvv : NeonI_3VDL2_2Op_mull_v3<0b0, 0b1110, "pmull2", "NI_pmull_hi", @@ -5878,12 +5883,21 @@ multiclass Neon_ScalarXIndexedElem_MUL_Patterns< (ExTy (vector_extract (VecOpTy VPRC:$MRm), OpImm:$Imm)))))), (ResTy (INST (OpVTy FPRC:$Rn), (VecOpTy VPRC:$MRm), OpImm:$Imm))>; + def : Pat<(ResTy (opnode (OpVTy FPRC:$Rn), + (OpVTy (extract_subvector (VecOpTy VPRC:$MRm), OpImm:$Imm)))), + (ResTy (INST (OpVTy FPRC:$Rn), (VecOpTy VPRC:$MRm), OpImm:$Imm))>; + //swapped operands def : Pat<(ResTy (opnode (OpVTy (scalar_to_vector (ExTy (vector_extract (VecOpTy VPRC:$MRm), OpImm:$Imm)))), (OpVTy FPRC:$Rn))), (ResTy (INST (OpVTy FPRC:$Rn), (VecOpTy VPRC:$MRm), OpImm:$Imm))>; + + def : Pat<(ResTy (opnode + (OpVTy (extract_subvector (VecOpTy VPRC:$MRm), OpImm:$Imm)), + (OpVTy FPRC:$Rn))), + (ResTy (INST (OpVTy FPRC:$Rn), (VecOpTy VPRC:$MRm), OpImm:$Imm))>; } @@ -5975,6 +5989,13 @@ multiclass Neon_ScalarXIndexedElem_MLAL_Patterns< (ResTy (INST (ResTy ResFPRC:$Ra), (OpTy FPRC:$Rn), (OpVTy VPRC:$MRm), OpImm:$Imm))>; + def : Pat<(ResTy (opnode + (ResTy ResFPRC:$Ra), + (ResTy (coreopnode (OpTy FPRC:$Rn), + (OpTy (extract_subvector (OpVTy VPRC:$MRm), OpImm:$Imm)))))), + (ResTy (INST (ResTy ResFPRC:$Ra), + (OpTy FPRC:$Rn), (OpVTy VPRC:$MRm), OpImm:$Imm))>; + // swapped operands def : Pat<(ResTy (opnode (ResTy ResFPRC:$Ra), @@ -5984,6 +6005,14 @@ multiclass Neon_ScalarXIndexedElem_MLAL_Patterns< (OpTy FPRC:$Rn))))), (ResTy (INST (ResTy ResFPRC:$Ra), (OpTy FPRC:$Rn), (OpVTy VPRC:$MRm), OpImm:$Imm))>; + + def : Pat<(ResTy (opnode + (ResTy ResFPRC:$Ra), + (ResTy (coreopnode + (OpTy (extract_subvector (OpVTy VPRC:$MRm), OpImm:$Imm)), + (OpTy FPRC:$Rn))))), + (ResTy (INST (ResTy ResFPRC:$Ra), + (OpTy FPRC:$Rn), (OpVTy VPRC:$MRm), OpImm:$Imm))>; } // Patterns for Scalar Signed saturating |