summaryrefslogtreecommitdiff
path: root/lib/Target/AArch64/Disassembler
diff options
context:
space:
mode:
authorHao Liu <Hao.Liu@arm.com>2013-11-28 01:07:45 +0000
committerHao Liu <Hao.Liu@arm.com>2013-11-28 01:07:45 +0000
commitcdd732cdd32aa1811a24c025b1d7912e2d94864b (patch)
tree34aa3d794a2734c26db6fbcb8433d2854107755b /lib/Target/AArch64/Disassembler
parent18a777a09a8bfaf54ebcd067fe135b600a58bc86 (diff)
downloadllvm-cdd732cdd32aa1811a24c025b1d7912e2d94864b.tar.gz
llvm-cdd732cdd32aa1811a24c025b1d7912e2d94864b.tar.bz2
llvm-cdd732cdd32aa1811a24c025b1d7912e2d94864b.tar.xz
AArch64: Fix a bug about disassembling post-index load single element to 4 vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195903 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AArch64/Disassembler')
-rw-r--r--lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp b/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
index 65f477642d..1f70a3d32c 100644
--- a/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+++ b/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
@@ -1342,13 +1342,13 @@ static DecodeStatus DecodeVLDSTLanePostInstruction(MCInst &Inst, unsigned Insn,
case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register: {
switch (Opc) {
case AArch64::LD4LN_WB_B_fixed: case AArch64::LD4LN_WB_B_register:
- TransferBytes = 3; break;
+ TransferBytes = 4; break;
case AArch64::LD4LN_WB_H_fixed: case AArch64::LD4LN_WB_H_register:
- TransferBytes = 6; break;
+ TransferBytes = 8; break;
case AArch64::LD4LN_WB_S_fixed: case AArch64::LD4LN_WB_S_register:
- TransferBytes = 12; break;
+ TransferBytes = 16; break;
case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register:
- TransferBytes = 24; break;
+ TransferBytes = 32; break;
}
IsLoad = true;
NumVecs = 4;