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authorJoey Gouly <joey.gouly@arm.com>2013-06-26 16:58:26 +0000
committerJoey Gouly <joey.gouly@arm.com>2013-06-26 16:58:26 +0000
commit849eedce9921eb8f285cd0df0ad69ee5133459d1 (patch)
tree0ff93bb431162234ff79d7ac320add1aee418058 /lib/Target/ARM/ARM.td
parent29acf7e03af9b5524daa1e7523e0296cc766ff24 (diff)
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Add a subtarget feature 'v8' to the ARM backend.
This allows for targeting the ARMv8 AArch32 variant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184967 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARM.td')
-rw-r--r--lib/Target/ARM/ARM.td6
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td
index 1bc9d6b410..134b83c2b5 100644
--- a/lib/Target/ARM/ARM.td
+++ b/lib/Target/ARM/ARM.td
@@ -138,6 +138,9 @@ def HasV6T2Ops : SubtargetFeature<"v6t2", "HasV6T2Ops", "true",
def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true",
"Support ARM v7 instructions",
[HasV6T2Ops, FeaturePerfMon]>;
+def HasV8Ops : SubtargetFeature<"v8", "HasV8Ops", "true",
+ "Support ARM v8 instructions",
+ [HasV7Ops]>;
//===----------------------------------------------------------------------===//
// ARM Processors supported.
@@ -291,6 +294,9 @@ def : ProcessorModel<"swift", SwiftModel,
FeatureDB, FeatureDSPThumb2,
FeatureHasRAS]>;
+// V8 Processors
+def : ProcNoItin<"cortex-a53", [HasV8Ops]>;
+
//===----------------------------------------------------------------------===//
// Register File Description
//===----------------------------------------------------------------------===//