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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-08-17 20:55:34 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-08-17 20:55:34 +0000
commita7fb3f68047556a7355e1f1080fb3d1ca9eb7078 (patch)
treea7db4137658b26a0c2b92c3000332f43b3fb6d48 /lib/Target/ARM/ARMBaseInstrInfo.cpp
parent72e9b6aeb48d9496bac9db8b02c88a618b464588 (diff)
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Avoid folding ADD instructions with FI operands.
PEI can't handle the pseudo-instructions. This can be removed when the pseudo-instructions are replaced by normal predicated instructions. Fixes PR13628. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162130 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMBaseInstrInfo.cpp')
-rw-r--r--lib/Target/ARM/ARMBaseInstrInfo.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 1cc5a17cb0..64d80dc67a 100644
--- a/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -1583,6 +1583,9 @@ static unsigned canFoldIntoMOVCC(unsigned Reg, MachineInstr *&MI,
// predicated instructions which will be reading CPSR.
for (unsigned i = 1, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
+ // Reject frame index operands, PEI can't handle the predicated pseudos.
+ if (MO.isFI() || MO.isCPI() || MO.isJTI())
+ return 0;
if (!MO.isReg())
continue;
if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))