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| author | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2014-02-26 11:27:28 +0000 |
|---|---|---|
| committer | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2014-02-26 11:27:28 +0000 |
| commit | e7082383732df492d8fabd17c31300db08de7627 (patch) | |
| tree | 449d776a03de2b2c617ed0252b2abf17e5681cc3 /lib/Target/ARM/ARMBaseInstrInfo.cpp | |
| parent | 3d0b46969073ca31a74b5a19c16163b6b24fb770 (diff) | |
| download | llvm-e7082383732df492d8fabd17c31300db08de7627.tar.gz llvm-e7082383732df492d8fabd17c31300db08de7627.tar.bz2 llvm-e7082383732df492d8fabd17c31300db08de7627.tar.xz | |
ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202257 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMBaseInstrInfo.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index a244c5fb8a..320f54a327 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -535,6 +535,20 @@ bool ARMBaseInstrInfo::isPredicable(MachineInstr *MI) const { return true; } +template<> bool IsCPSRDead<MachineInstr>(MachineInstr* MI) { + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + const MachineOperand &MO = MI->getOperand(i); + if (!MO.isReg() || MO.isUndef() || MO.isUse()) + continue; + if (MO.getReg() != ARM::CPSR) + continue; + if (!MO.isDead()) + return false; + } + // all definitions of CPSR are dead + return true; +} + /// FIXME: Works around a gcc miscompilation with -fstrict-aliasing. LLVM_ATTRIBUTE_NOINLINE static unsigned getNumJTEntries(const std::vector<MachineJumpTableEntry> &JT, |