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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-10-26 20:38:19 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-10-26 20:38:19 +0000 |
| commit | f4a5a613faa1a0eca6b884a6dfe83e8b1eb957b2 (patch) | |
| tree | 0469cc4949de88c6550c45ef38c74cc7138cf035 /lib/Target/ARM/ARMBaseRegisterInfo.h | |
| parent | b8b3f6081f8dc409e7281e1597d8d94e50e4b028 (diff) | |
| download | llvm-f4a5a613faa1a0eca6b884a6dfe83e8b1eb957b2.tar.gz llvm-f4a5a613faa1a0eca6b884a6dfe83e8b1eb957b2.tar.bz2 llvm-f4a5a613faa1a0eca6b884a6dfe83e8b1eb957b2.tar.xz | |
Remove the canCombineSubRegIndices() target hook.
The new coalescer can already do all of this, so there is no need to
duplicate the efforts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166813 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMBaseRegisterInfo.h')
| -rw-r--r-- | lib/Target/ARM/ARMBaseRegisterInfo.h | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.h b/lib/Target/ARM/ARMBaseRegisterInfo.h index da29f7e711..85c58aa2ea 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.h +++ b/lib/Target/ARM/ARMBaseRegisterInfo.h @@ -99,16 +99,6 @@ public: BitVector getReservedRegs(const MachineFunction &MF) const; - /// canCombineSubRegIndices - Given a register class and a list of - /// subregister indices, return true if it's possible to combine the - /// subregister indices into one that corresponds to a larger - /// subregister. Return the new subregister index by reference. Note the - /// new index may be zero if the given subregisters can be combined to - /// form the whole register. - virtual bool canCombineSubRegIndices(const TargetRegisterClass *RC, - SmallVectorImpl<unsigned> &SubIndices, - unsigned &NewSubIdx) const; - const TargetRegisterClass* getPointerRegClass(const MachineFunction &MF, unsigned Kind = 0) const; const TargetRegisterClass* |