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authorJim Grosbach <grosbach@apple.com>2010-10-26 22:37:02 +0000
committerJim Grosbach <grosbach@apple.com>2010-10-26 22:37:02 +0000
commit3e5561247202bae994dd259a2d8dc4eff8f799f3 (patch)
tree4a3d53fc109ee222ad3a4dae98373aca68dcff1f /lib/Target/ARM/ARMCodeEmitter.cpp
parent3a0e0715a5691e26ca70bc853d6d3d116e5949b8 (diff)
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First part of refactoring ARM addrmode2 (load/store) instructions to be more
explicit about the operands. Split out the different variants into separate instructions. This gives us the ability to, among other things, assign different scheduling itineraries to the variants. rdar://8477752. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117409 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMCodeEmitter.cpp')
-rw-r--r--lib/Target/ARM/ARMCodeEmitter.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 78a73e2aff..edb9c906b1 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -174,6 +174,8 @@ namespace {
const { return 0; }
unsigned getBitfieldInvertedMaskOpValue(const MachineInstr &MI,
unsigned Op) const { return 0; }
+ unsigned getAddrModeImm12OpValue(const MachineInstr &MI, unsigned Op)
+ const { return 0; }
/// getMovi32Value - Return binary encoding of operand for movw/movt. If the
/// machine operand requires relocation, record the relocation and return