summaryrefslogtreecommitdiff
path: root/lib/Target/ARM/ARMConstantIslandPass.cpp
diff options
context:
space:
mode:
authorOwen Anderson <resistor@mac.com>2011-02-08 22:39:40 +0000
committerOwen Anderson <resistor@mac.com>2011-02-08 22:39:40 +0000
commit971b83b67a9812556cdb97bb58aa96fb37af458d (patch)
treef930f489860440e92e4bc792b16ac97c96583303 /lib/Target/ARM/ARMConstantIslandPass.cpp
parent0fd90bc12f77820e757ef3a427fab9f66aba6381 (diff)
downloadllvm-971b83b67a9812556cdb97bb58aa96fb37af458d.tar.gz
llvm-971b83b67a9812556cdb97bb58aa96fb37af458d.tar.bz2
llvm-971b83b67a9812556cdb97bb58aa96fb37af458d.tar.xz
Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 (which worked around it). This should get us back to the old, correct behavior, though it will make the integrated assembler unhappy for the time being.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125127 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMConstantIslandPass.cpp')
-rw-r--r--lib/Target/ARM/ARMConstantIslandPass.cpp20
1 files changed, 1 insertions, 19 deletions
diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp
index f8f717e4d4..934daba552 100644
--- a/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ b/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -613,11 +613,7 @@ void ARMConstantIslands::InitialFunctionScan(MachineFunction &MF,
case ARM::LDRi12:
case ARM::LDRcp:
- case ARM::t2LDRi12:
- case ARM::t2LDRHi12:
- case ARM::t2LDRBi12:
- case ARM::t2LDRSHi12:
- case ARM::t2LDRSBi12:
+ case ARM::t2LDRpci:
Bits = 12; // +-offset_12
NegOk = true;
break;
@@ -1576,16 +1572,6 @@ bool ARMConstantIslands::OptimizeThumb2Instructions(MachineFunction &MF) {
Scale = 4;
}
break;
- case ARM::t2LDRi12:
- // FIXME: Temporary workaround for a bug introduced by r121082.
- // We should use t2LDRpci for loads from constantpools.
- if (isARMLowRegister(U.MI->getOperand(0).getReg()) &&
- U.MI->getOperand(1).getReg() == ARM::PC) {
- NewOpc = ARM::tLDRpci;
- Bits = 8;
- Scale = 4;
- }
- break;
}
if (!NewOpc)
@@ -1596,10 +1582,6 @@ bool ARMConstantIslands::OptimizeThumb2Instructions(MachineFunction &MF) {
// FIXME: Check if offset is multiple of scale if scale is not 4.
if (CPEIsInRange(U.MI, UserOffset, U.CPEMI, MaxOffs, false, true)) {
U.MI->setDesc(TII->get(NewOpc));
- if (NewOpc == ARM::tLDRpci)
- // FIXME: Temporary workaround.
- // PC is now an implicit operand.
- U.MI->RemoveOperand(1);
MachineBasicBlock *MBB = U.MI->getParent();
BBSizes[MBB->getNumber()] -= 2;
AdjustBBOffsetsAfter(MBB, -2);