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| author | Owen Anderson <resistor@mac.com> | 2010-12-13 22:29:52 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2010-12-13 22:29:52 +0000 |
| commit | e8d02539d7981c07d301d91a6a5b6ad34099b510 (patch) | |
| tree | 98cf73472c721ea7d854068977b4e6ec11062ed5 /lib/Target/ARM/ARMConstantIslandPass.cpp | |
| parent | 4dedddce93ffb4476fb269caddb10da60a0a8d84 (diff) | |
| download | llvm-e8d02539d7981c07d301d91a6a5b6ad34099b510.tar.gz llvm-e8d02539d7981c07d301d91a6a5b6ad34099b510.tar.bz2 llvm-e8d02539d7981c07d301d91a6a5b6ad34099b510.tar.xz | |
Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provide correct fixups for Thumb2 ADR,
which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121721 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMConstantIslandPass.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMConstantIslandPass.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp index 8066cb735b..9434ecf40b 100644 --- a/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -594,7 +594,7 @@ void ARMConstantIslands::InitialFunctionScan(MachineFunction &MF, NegOk = true; IsSoImm = true; break; - case ARM::t2LEApcrel: + case ARM::t2ADR: Bits = 12; NegOk = true; break; @@ -1555,7 +1555,7 @@ bool ARMConstantIslands::OptimizeThumb2Instructions(MachineFunction &MF) { unsigned Bits = 0; switch (Opcode) { default: break; - case ARM::t2LEApcrel: + case ARM::t2ADR: if (isARMLowRegister(U.MI->getOperand(0).getReg())) { NewOpc = ARM::tLEApcrel; Bits = 8; @@ -1754,16 +1754,16 @@ bool ARMConstantIslands::OptimizeThumb2JumpTables(MachineFunction &MF) { if (!OptOk) continue; - // Now scan back again to find the tLEApcrel or t2LEApcrelJT instruction + // Now scan back again to find the tLEApcrel or t2ADR instruction // that gave us the initial base register definition. for (--PrevI; PrevI != B && !PrevI->definesRegister(BaseReg); --PrevI) ; - // The instruction should be a tLEApcrel or t2LEApcrelJT; we want + // The instruction should be a tLEApcrel or t2ADR; we want // to delete it as well. MachineInstr *LeaMI = PrevI; if ((LeaMI->getOpcode() != ARM::tLEApcrelJT && - LeaMI->getOpcode() != ARM::t2LEApcrelJT) || + LeaMI->getOpcode() != ARM::t2ADR) || LeaMI->getOperand(0).getReg() != BaseReg) OptOk = false; |