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| author | Jim Grosbach <grosbach@apple.com> | 2011-10-21 23:58:57 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-10-21 23:58:57 +0000 |
| commit | 224180e81b34c99d15e35a4d4de6729357c6d372 (patch) | |
| tree | 227e55002d8e2f407b91f42d32a78a79f23bbe02 /lib/Target/ARM/ARMExpandPseudoInsts.cpp | |
| parent | 4661d4cac3ba7f480a91d0ccd35fb2d22d9692d3 (diff) | |
| download | llvm-224180e81b34c99d15e35a4d4de6729357c6d372.tar.gz llvm-224180e81b34c99d15e35a4d4de6729357c6d372.tar.bz2 llvm-224180e81b34c99d15e35a4d4de6729357c6d372.tar.xz | |
Assembly parsing for 4-register sequential variant of VLD2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142704 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMExpandPseudoInsts.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMExpandPseudoInsts.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/lib/Target/ARM/ARMExpandPseudoInsts.cpp index 75b48d1b15..77bad0c11e 100644 --- a/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -181,12 +181,12 @@ static const NEONLdStTableEntry NEONLdStTable[] = { { ARM::VLD2d8Pseudo, ARM::VLD2d8, true, false, SingleSpc, 2, 8 ,false}, { ARM::VLD2d8Pseudo_UPD, ARM::VLD2d8_UPD, true, true, SingleSpc, 2, 8 ,false}, -{ ARM::VLD2q16Pseudo, ARM::VLD2q16, true, false, SingleSpc, 4, 4 ,true}, -{ ARM::VLD2q16Pseudo_UPD, ARM::VLD2q16_UPD, true, true, SingleSpc, 4, 4 ,true}, -{ ARM::VLD2q32Pseudo, ARM::VLD2q32, true, false, SingleSpc, 4, 2 ,true}, -{ ARM::VLD2q32Pseudo_UPD, ARM::VLD2q32_UPD, true, true, SingleSpc, 4, 2 ,true}, -{ ARM::VLD2q8Pseudo, ARM::VLD2q8, true, false, SingleSpc, 4, 8 ,true}, -{ ARM::VLD2q8Pseudo_UPD, ARM::VLD2q8_UPD, true, true, SingleSpc, 4, 8 ,true}, +{ ARM::VLD2q16Pseudo, ARM::VLD2q16, true, false, SingleSpc, 4, 4 ,false}, +{ ARM::VLD2q16Pseudo_UPD, ARM::VLD2q16_UPD, true, true, SingleSpc, 4, 4 ,false}, +{ ARM::VLD2q32Pseudo, ARM::VLD2q32, true, false, SingleSpc, 4, 2 ,false}, +{ ARM::VLD2q32Pseudo_UPD, ARM::VLD2q32_UPD, true, true, SingleSpc, 4, 2 ,false}, +{ ARM::VLD2q8Pseudo, ARM::VLD2q8, true, false, SingleSpc, 4, 8 ,false}, +{ ARM::VLD2q8Pseudo_UPD, ARM::VLD2q8_UPD, true, true, SingleSpc, 4, 8 ,false}, { ARM::VLD3DUPd16Pseudo, ARM::VLD3DUPd16, true, false, SingleSpc, 3, 4,true}, { ARM::VLD3DUPd16Pseudo_UPD, ARM::VLD3DUPd16_UPD, true, true, SingleSpc, 3, 4,true}, |