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| author | Bob Wilson <bob.wilson@apple.com> | 2010-11-30 00:00:35 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-11-30 00:00:35 +0000 |
| commit | 6c4c982f83eea655e0f14610d2689fad722aeb7d (patch) | |
| tree | 40faf3d38d5f3656df7e4b2439db5389c8a622b9 /lib/Target/ARM/ARMExpandPseudoInsts.cpp | |
| parent | e76473d9ba1222cb38958d5b05204417e8c2f469 (diff) | |
| download | llvm-6c4c982f83eea655e0f14610d2689fad722aeb7d.tar.gz llvm-6c4c982f83eea655e0f14610d2689fad722aeb7d.tar.bz2 llvm-6c4c982f83eea655e0f14610d2689fad722aeb7d.tar.xz | |
Add support for NEON VLD3-dup instructions.
The encoding for alignment in VLD4-dup instructions is still a work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120356 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMExpandPseudoInsts.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMExpandPseudoInsts.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/lib/Target/ARM/ARMExpandPseudoInsts.cpp index a78ed2616b..1cc5bd60b9 100644 --- a/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -204,6 +204,13 @@ static const NEONLdStTableEntry NEONLdStTable[] = { { ARM::VLD3q8Pseudo_UPD, ARM::VLD3q8_UPD, true, true, EvenDblSpc, 3, 8 }, { ARM::VLD3q8oddPseudo_UPD, ARM::VLD3q8_UPD, true, true, OddDblSpc, 3, 8 }, +{ ARM::VLD4DUPd16Pseudo, ARM::VLD4DUPd16, true, false, SingleSpc, 4, 4}, +{ ARM::VLD4DUPd16Pseudo_UPD, ARM::VLD4DUPd16_UPD, true, true, SingleSpc, 4, 4}, +{ ARM::VLD4DUPd32Pseudo, ARM::VLD4DUPd32, true, false, SingleSpc, 4, 2}, +{ ARM::VLD4DUPd32Pseudo_UPD, ARM::VLD4DUPd32_UPD, true, true, SingleSpc, 4, 2}, +{ ARM::VLD4DUPd8Pseudo, ARM::VLD4DUPd8, true, false, SingleSpc, 4, 8}, +{ ARM::VLD4DUPd8Pseudo_UPD, ARM::VLD4DUPd8_UPD, true, true, SingleSpc, 4, 8}, + { ARM::VLD4LNd16Pseudo, ARM::VLD4LNd16, true, false, SingleSpc, 4, 4 }, { ARM::VLD4LNd16Pseudo_UPD, ARM::VLD4LNd16_UPD, true, true, SingleSpc, 4, 4 }, { ARM::VLD4LNd32Pseudo, ARM::VLD4LNd32, true, false, SingleSpc, 4, 2 }, @@ -959,6 +966,12 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) { case ARM::VLD3DUPd8Pseudo_UPD: case ARM::VLD3DUPd16Pseudo_UPD: case ARM::VLD3DUPd32Pseudo_UPD: + case ARM::VLD4DUPd8Pseudo: + case ARM::VLD4DUPd16Pseudo: + case ARM::VLD4DUPd32Pseudo: + case ARM::VLD4DUPd8Pseudo_UPD: + case ARM::VLD4DUPd16Pseudo_UPD: + case ARM::VLD4DUPd32Pseudo_UPD: ExpandVLD(MBBI); break; |