summaryrefslogtreecommitdiff
path: root/lib/Target/ARM/ARMFastISel.cpp
diff options
context:
space:
mode:
authorTim Northover <tnorthover@apple.com>2014-02-04 10:38:46 +0000
committerTim Northover <tnorthover@apple.com>2014-02-04 10:38:46 +0000
commit284c931330404e61d548fc1eedf44d5dd1b87507 (patch)
treea61f753c75c4e7d6e54462ebf075f9fb37236165 /lib/Target/ARM/ARMFastISel.cpp
parentc55ee815d49693df6511ae72b03600bf7afe7863 (diff)
downloadllvm-284c931330404e61d548fc1eedf44d5dd1b87507.tar.gz
llvm-284c931330404e61d548fc1eedf44d5dd1b87507.tar.bz2
llvm-284c931330404e61d548fc1eedf44d5dd1b87507.tar.xz
ARM: fix fast-isel assertion failure
Missing braces on if meant we inserted both ARM and Thumb load for a litpool entry. This didn't end well. rdar://problem/15959157 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200752 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r--lib/Target/ARM/ARMFastISel.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index 32b6929166..68fcee7d24 100644
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -653,13 +653,14 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, MVT VT) {
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(ARM::t2LDRpci), DestReg)
.addConstantPoolIndex(Idx));
- else
+ else {
// The extra immediate is for addrmode2.
DestReg = constrainOperandRegClass(TII.get(ARM::LDRcp), DestReg, 0);
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(ARM::LDRcp), DestReg)
.addConstantPoolIndex(Idx)
.addImm(0));
+ }
return DestReg;
}