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author | Chad Rosier <mcrosier@apple.com> | 2011-11-04 00:50:21 +0000 |
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committer | Chad Rosier <mcrosier@apple.com> | 2011-11-04 00:50:21 +0000 |
commit | f470cbbad204caa85275873004151b92fba24375 (patch) | |
tree | d20b85e914050f229b2467524c91043734857b6d /lib/Target/ARM/ARMFastISel.cpp | |
parent | 28eb1c5217416aa60b06b8b569a5de8047f75514 (diff) | |
download | llvm-f470cbbad204caa85275873004151b92fba24375.tar.gz llvm-f470cbbad204caa85275873004151b92fba24375.tar.bz2 llvm-f470cbbad204caa85275873004151b92fba24375.tar.xz |
Add fast-isel support for returning i1, i8, and i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143669 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index d1f2c7fcdd..ab5caa3d5e 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -1751,19 +1751,32 @@ bool ARMFastISel::SelectRet(const Instruction *I) { CCValAssign &VA = ValLocs[0]; // Don't bother handling odd stuff for now. - // FIXME: Should be able to handle i1, i8, and/or i16 return types. if (VA.getLocInfo() != CCValAssign::Full) return false; // Only handle register returns for now. if (!VA.isRegLoc()) return false; - // TODO: For now, don't try to handle cases where getLocInfo() - // says Full but the types don't match. - if (TLI.getValueType(RV->getType()) != VA.getValVT()) - return false; - // Make the copy. unsigned SrcReg = Reg + VA.getValNo(); + EVT RVVT = TLI.getValueType(RV->getType()); + EVT DestVT = VA.getValVT(); + // Special handling for extended integers. + if (RVVT != DestVT) { + if (RVVT != MVT::i1 && RVVT != MVT::i8 && RVVT != MVT::i16) + return false; + + if (!Outs[0].Flags.isZExt() && !Outs[0].Flags.isSExt()) + return false; + + assert(DestVT == MVT::i32 && "ARM should always ext to i32"); + + bool isZExt = Outs[0].Flags.isZExt(); + unsigned ResultReg = ARMEmitIntExt(RVVT, SrcReg, DestVT, isZExt); + if (ResultReg == 0) return false; + SrcReg = ResultReg; + } + + // Make the copy. unsigned DstReg = VA.getLocReg(); const TargetRegisterClass* SrcRC = MRI.getRegClass(SrcReg); // Avoid a cross-class copy. This is very unlikely. |