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| author | Evan Cheng <evan.cheng@apple.com> | 2007-04-04 00:06:07 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-04-04 00:06:07 +0000 |
| commit | 0a7baa24d17be1a3f4dc5bca53bc89a30dbc24db (patch) | |
| tree | d5b65370f1cc908cacdfbd7bd603814a168735fa /lib/Target/ARM/ARMISelLowering.cpp | |
| parent | 71bfd11c6775cb7fde580f5b4d21cedc63f0867f (diff) | |
| download | llvm-0a7baa24d17be1a3f4dc5bca53bc89a30dbc24db.tar.gz llvm-0a7baa24d17be1a3f4dc5bca53bc89a30dbc24db.tar.bz2 llvm-0a7baa24d17be1a3f4dc5bca53bc89a30dbc24db.tar.xz | |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35639 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index a8e8e2dbda..ef8ab012bb 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -1637,7 +1637,7 @@ ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, case 'w': if (VT == MVT::f32) return std::make_pair(0U, ARM::SPRRegisterClass); - if (VT == MVT::f32) + if (VT == MVT::f64) return std::make_pair(0U, ARM::DPRRegisterClass); break; } |