diff options
| author | Renato Golin <rengolin@systemcall.org> | 2012-12-20 13:52:11 +0000 |
|---|---|---|
| committer | Renato Golin <rengolin@systemcall.org> | 2012-12-20 13:52:11 +0000 |
| commit | 332bd799512142e23d35105483520acbffff72c8 (patch) | |
| tree | 3742278b357b08cc5c1935dec9be24a9af5b918f /lib/Target/ARM/ARMISelLowering.cpp | |
| parent | da5cd6a180f8174685aaa3fc0b92e171ec032f4c (diff) | |
| download | llvm-332bd799512142e23d35105483520acbffff72c8.tar.gz llvm-332bd799512142e23d35105483520acbffff72c8.tar.bz2 llvm-332bd799512142e23d35105483520acbffff72c8.tar.xz | |
Adding support for llvm.arm.neon.vaddl[su].* and
llvm.arm.neon.vsub[su].* intrinsics.
Patch by Pete Couperus <pjcoup@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170694 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 8034ce1604..1105f412cc 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -1007,6 +1007,10 @@ const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const { case ARMISD::VTBL2: return "ARMISD::VTBL2"; case ARMISD::VMULLs: return "ARMISD::VMULLs"; case ARMISD::VMULLu: return "ARMISD::VMULLu"; + case ARMISD::VADDLs: return "ARMISD::VADDLs"; + case ARMISD::VADDLu: return "ARMISD::VADDLu"; + case ARMISD::VSUBLs: return "ARMISD::VSUBLs"; + case ARMISD::VSUBLu: return "ARMISD::VSUBLu"; case ARMISD::UMLAL: return "ARMISD::UMLAL"; case ARMISD::SMLAL: return "ARMISD::SMLAL"; case ARMISD::BUILD_VECTOR: return "ARMISD::BUILD_VECTOR"; @@ -2429,6 +2433,20 @@ ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG, return DAG.getNode(NewOpc, Op.getDebugLoc(), Op.getValueType(), Op.getOperand(1), Op.getOperand(2)); } + case Intrinsic::arm_neon_vaddls: + case Intrinsic::arm_neon_vaddlu: { + unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vaddls) + ? ARMISD::VADDLs : ARMISD::VADDLu; + return DAG.getNode(NewOpc, Op.getDebugLoc(), Op.getValueType(), + Op.getOperand(1), Op.getOperand(2)); + } + case Intrinsic::arm_neon_vsubls: + case Intrinsic::arm_neon_vsublu: { + unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vsubls) + ? ARMISD::VSUBLs: ARMISD::VSUBLu; + return DAG.getNode(NewOpc, Op.getDebugLoc(), Op.getValueType(), + Op.getOperand(1), Op.getOperand(2)); + } } } |