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authorEvan Cheng <evan.cheng@apple.com>2012-12-06 01:28:01 +0000
committerEvan Cheng <evan.cheng@apple.com>2012-12-06 01:28:01 +0000
commit8a7186dbc2df4879f511b2ae6f2bce25ad37d965 (patch)
tree7a1dc668bbffd63ce75f956a7d49943d09be5e87 /lib/Target/ARM/ARMISelLowering.h
parent486a7ad94fc948a0f52c32c860cdb2b166741249 (diff)
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Let targets provide hooks that compute known zero and ones for any_extend
and extload's. If they are implemented as zero-extend, or implicitly zero-extend, then this can enable more demanded bits optimizations. e.g. define void @foo(i16* %ptr, i32 %a) nounwind { entry: %tmp1 = icmp ult i32 %a, 100 br i1 %tmp1, label %bb1, label %bb2 bb1: %tmp2 = load i16* %ptr, align 2 br label %bb2 bb2: %tmp3 = phi i16 [ 0, %entry ], [ %tmp2, %bb1 ] %cmp = icmp ult i16 %tmp3, 24 br i1 %cmp, label %bb3, label %exit bb3: call void @bar() nounwind br label %exit exit: ret void } This compiles to the followings before: push {lr} mov r2, #0 cmp r1, #99 bhi LBB0_2 @ BB#1: @ %bb1 ldrh r2, [r0] LBB0_2: @ %bb2 uxth r0, r2 cmp r0, #23 bhi LBB0_4 @ BB#3: @ %bb3 bl _bar LBB0_4: @ %exit pop {lr} bx lr The uxth is not needed since ldrh implicitly zero-extend the high bits. With this change it's eliminated. rdar://12771555 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169459 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMISelLowering.h')
-rw-r--r--lib/Target/ARM/ARMISelLowering.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h
index 487c925dd9..bde2ad4924 100644
--- a/lib/Target/ARM/ARMISelLowering.h
+++ b/lib/Target/ARM/ARMISelLowering.h
@@ -333,6 +333,11 @@ namespace llvm {
const SelectionDAG &DAG,
unsigned Depth) const;
+ virtual void computeMaskedBitsForAnyExtend(const SDValue Op,
+ APInt &KnownZero,
+ APInt &KnownOne,
+ const SelectionDAG &DAG,
+ unsigned Depth) const;
virtual bool ExpandInlineAsm(CallInst *CI) const;