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| author | Silviu Baranga <silviu.baranga@arm.com> | 2012-04-18 14:18:57 +0000 |
|---|---|---|
| committer | Silviu Baranga <silviu.baranga@arm.com> | 2012-04-18 14:18:57 +0000 |
| commit | 35ee7d28a69173ca0c11fb6b3271518bf4c5bff6 (patch) | |
| tree | 36cdf572e03f4af86d90597d0ed00c5bbf0727d4 /lib/Target/ARM/ARMInstrFormats.td | |
| parent | 6b9f97dd892b0d61d8a1f0ee4f837058f2ca4552 (diff) | |
| download | llvm-35ee7d28a69173ca0c11fb6b3271518bf4c5bff6.tar.gz llvm-35ee7d28a69173ca0c11fb6b3271518bf4c5bff6.tar.bz2 llvm-35ee7d28a69173ca0c11fb6b3271518bf4c5bff6.tar.xz | |
Added support for disassembling unpredictable swp/swpb ARM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155004 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrFormats.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 1d38bcf9e8..f04926aace 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -532,6 +532,7 @@ class AIswp<bit b, dag oops, dag iops, string opc, list<dag> pattern> let Inst{11-4} = 0b00001001; let Inst{3-0} = Rt2; + let Unpredictable{11-8} = 0b1111; let DecoderMethod = "DecodeSwap"; } |