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author | Jim Grosbach <grosbach@apple.com> | 2011-08-19 20:46:54 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2011-08-19 20:46:54 +0000 |
commit | 4ec6e888ec6d12b5255afd685b05c8fee1f7fc73 (patch) | |
tree | 8df54f2bf6caecf948d86f4986c7f6eafed1ff72 /lib/Target/ARM/ARMInstrFormats.td | |
parent | c68e927488819efd671207786baadce6cae7266c (diff) | |
download | llvm-4ec6e888ec6d12b5255afd685b05c8fee1f7fc73.tar.gz llvm-4ec6e888ec6d12b5255afd685b05c8fee1f7fc73.tar.bz2 llvm-4ec6e888ec6d12b5255afd685b05c8fee1f7fc73.tar.xz |
Thumb assembly parsing and encoding for MOV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138076 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrFormats.td')
-rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 17a82b1024..0f4b2648cf 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -148,7 +148,7 @@ def iflags_op : Operand<i32> { // ARM Predicate operand. Default to 14 = always (AL). Second part is CC // register whose default is 0 (no register). def CondCodeOperand : AsmOperandClass { let Name = "CondCode"; } -def pred : PredicateOperand<OtherVT, (ops i32imm, CCR), +def pred : PredicateOperand<OtherVT, (ops i32imm, i32imm), (ops (i32 14), (i32 zero_reg))> { let PrintMethod = "printPredicateOperand"; let ParserMatchClass = CondCodeOperand; |