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| author | Tim Northover <tnorthover@apple.com> | 2013-10-24 15:49:39 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-10-24 15:49:39 +0000 |
| commit | 44edc227c743052bd58e73a5e1402fa68ed728f0 (patch) | |
| tree | 135b3971debd3bebaf1c28369fdb8351dc3c2cd1 /lib/Target/ARM/ARMInstrInfo.td | |
| parent | 93fd763184aba63da67bc6554379d202671d7b52 (diff) | |
| download | llvm-44edc227c743052bd58e73a5e1402fa68ed728f0.tar.gz llvm-44edc227c743052bd58e73a5e1402fa68ed728f0.tar.bz2 llvm-44edc227c743052bd58e73a5e1402fa68ed728f0.tar.xz | |
ARM: Mark double-precision instructions as such
This prevents us from silently accepting invalid instructions on (for example)
Cortex-M4 with just single-precision VFP support.
No tests for the extra Pat Requires because they're essentially assertions: the
affected code should have been lowered to libcalls before ISel.
rdar://problem/15302004
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193354 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 01fce69700..a200ba44f5 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -212,6 +212,9 @@ def HasVFP3 : Predicate<"Subtarget->hasVFP3()">, AssemblerPredicate<"FeatureVFP3", "VFP3">; def HasVFP4 : Predicate<"Subtarget->hasVFP4()">, AssemblerPredicate<"FeatureVFP4", "VFP4">; +def HasDPVFP : Predicate<"!Subtarget->isFPOnlySP()">, + AssemblerPredicate<"!FeatureVFPOnlySP", + "double precision VFP">; def HasFPARMv8 : Predicate<"Subtarget->hasFPARMv8()">, AssemblerPredicate<"FeatureFPARMv8", "FPARMv8">; def HasNEON : Predicate<"Subtarget->hasNEON()">, |