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| author | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-01-10 16:22:47 +0000 |
|---|---|---|
| committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-01-10 16:22:47 +0000 |
| commit | 793e2aaa73dfd19ee223ccad24f8b7a6de53812a (patch) | |
| tree | cf79b9445a363421c1f7a17f1faeb5683e1d485d /lib/Target/ARM/ARMInstrInfo.td | |
| parent | a9608f7f0e7679cdc424f44732a5647dcfb38081 (diff) | |
| download | llvm-793e2aaa73dfd19ee223ccad24f8b7a6de53812a.tar.gz llvm-793e2aaa73dfd19ee223ccad24f8b7a6de53812a.tar.bz2 llvm-793e2aaa73dfd19ee223ccad24f8b7a6de53812a.tar.xz | |
ARM: fix regression caused by r198914
The disassembler would no longer be able to disambiguage between the two
variants (explicit immediate #0 vs implicit, omitted #0) for the ldrt, strt,
ldrbt, strbt mnemonics as both versions indicated the disassembler routine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198944 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 25 |
1 files changed, 17 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index ad134d3f99..3d38cc9896 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -2463,12 +2463,14 @@ class LDRTImmediate<bit has_offset, string args, dag iops> let Inst{21} = 1; // overwrite let Inst{19-16} = addr; let Inst{11-0} = !if(has_offset, offset{11-0}, 0); - let DecoderMethod = "DecodeAddrMode2IdxInstruction"; } def LDRT_POST_IMM : LDRTImmediate<1, "\t$Rt, $addr, $offset", - (ins addr_offset_none:$addr, am2offset_imm:$offset)>; + (ins addr_offset_none:$addr, am2offset_imm:$offset)> { + let DecoderMethod = "DecodeAddrMode2IdxInstruction"; +} + def LDRT_POST_IMM_0 : LDRTImmediate<0, "\t$Rt, $addr", (ins addr_offset_none:$addr)>; @@ -2504,12 +2506,14 @@ class LDRBTImmediate<bit has_offset, string args, dag iops> let Inst{21} = 1; // overwrite let Inst{19-16} = addr; let Inst{11-0} = !if(has_offset, offset{11-0}, 0); - let DecoderMethod = "DecodeAddrMode2IdxInstruction"; } def LDRBT_POST_IMM : LDRBTImmediate<1, "\t$Rt, $addr, $offset", - (ins addr_offset_none:$addr, am2offset_imm:$offset)>; + (ins addr_offset_none:$addr, am2offset_imm:$offset)> { + let DecoderMethod = "DecodeAddrMode2IdxInstruction"; +} + def LDRBT_POST_IMM_0 : LDRBTImmediate<0, "\t$Rt, $addr", (ins addr_offset_none:$addr)>; @@ -2785,12 +2789,15 @@ class STRBTImmediate<bit has_offset, string args, dag iops> let Inst{21} = 1; // overwrite let Inst{19-16} = addr; let Inst{11-0} = !if(has_offset, offset{11-0}, 0); - let DecoderMethod = "DecodeAddrMode2IdxInstruction"; } def STRBT_POST_IMM : STRBTImmediate<1, "\t$Rt, $addr, $offset", - (ins GPR:$Rt, addr_offset_none:$addr, am2offset_imm:$offset)>; + (ins GPR:$Rt, addr_offset_none:$addr, am2offset_imm:$offset)> { + let DecoderMethod = "DecodeAddrMode2IdxInstruction"; +} + + def STRBT_POST_IMM_0 : STRBTImmediate<0, "\t$Rt, $addr", (ins GPR:$Rt, addr_offset_none:$addr)>; @@ -2826,12 +2833,14 @@ class STRTImmediate<bit has_offset, string args, dag iops> let Inst{21} = 1; // overwrite let Inst{19-16} = addr; let Inst{11-0} = !if(has_offset, offset{11-0}, 0); - let DecoderMethod = "DecodeAddrMode2IdxInstruction"; } def STRT_POST_IMM : STRTImmediate<1, "\t$Rt, $addr, $offset", - (ins GPR:$Rt, addr_offset_none:$addr, am2offset_imm:$offset)>; + (ins GPR:$Rt, addr_offset_none:$addr, am2offset_imm:$offset)> { + let DecoderMethod = "DecodeAddrMode2IdxInstruction"; +} + def STRT_POST_IMM_0 : STRTImmediate<0, "\t$Rt, $addr", (ins GPR:$Rt, addr_offset_none:$addr)>; } |