summaryrefslogtreecommitdiff
path: root/lib/Target/ARM/ARMInstrNEON.td
diff options
context:
space:
mode:
authorJim Grosbach <grosbach@apple.com>2012-03-05 21:09:58 +0000
committerJim Grosbach <grosbach@apple.com>2012-03-05 21:09:58 +0000
commitaf9f4bc752292b3282f110c11aeb2a1ffb710bbf (patch)
tree3d9eb2053379a463e5a70aa7c60bebd75891a910 /lib/Target/ARM/ARMInstrNEON.td
parent28f08c93e75d291695ea89b9004145103292e85b (diff)
downloadllvm-af9f4bc752292b3282f110c11aeb2a1ffb710bbf.tar.gz
llvm-af9f4bc752292b3282f110c11aeb2a1ffb710bbf.tar.bz2
llvm-af9f4bc752292b3282f110c11aeb2a1ffb710bbf.tar.xz
ARM Remove a bit of dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152061 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrNEON.td')
-rw-r--r--lib/Target/ARM/ARMInstrNEON.td9
1 files changed, 0 insertions, 9 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td
index b0ab9941f9..1fa3979b3d 100644
--- a/lib/Target/ARM/ARMInstrNEON.td
+++ b/lib/Target/ARM/ARMInstrNEON.td
@@ -89,15 +89,6 @@ def VecListOneD : RegisterOperand<DPR, "printVectorListOne"> {
let ParserMatchClass = VecListOneDAsmOperand;
}
// Register list of two sequential D registers.
-def VecListTwoDAsmOperand : AsmOperandClass {
- let Name = "VecListTwoD";
- let ParserMethod = "parseVectorList";
- let RenderMethod = "addVecListOperands";
-}
-def VecListTwoD : RegisterOperand<DPR, "printVectorListTwo"> {
- let ParserMatchClass = VecListTwoDAsmOperand;
-}
-// FIXME: Replace all VecListTwoD with VecListDPair
def VecListDPairAsmOperand : AsmOperandClass {
let Name = "VecListDPair";
let ParserMethod = "parseVectorList";