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author | Jim Grosbach <grosbach@apple.com> | 2011-07-08 17:40:42 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2011-07-08 17:40:42 +0000 |
commit | 53e3fc463e3d9ee840510b08ebd6db17694fa2c5 (patch) | |
tree | 71fe1ad693adb5b1a05e53eaba155545b11588cb /lib/Target/ARM/ARMInstrThumb.td | |
parent | 86f9adb8becf5da6962bd89301e96bccba26f72a (diff) | |
download | llvm-53e3fc463e3d9ee840510b08ebd6db17694fa2c5.tar.gz llvm-53e3fc463e3d9ee840510b08ebd6db17694fa2c5.tar.bz2 llvm-53e3fc463e3d9ee840510b08ebd6db17694fa2c5.tar.xz |
Use TableGen'erated pseudo lowering for ARM.
Hook up the TableGen lowering for simple pseudo instructions for ARM and
use it for a subset of the many pseudos the backend has as proof of concept.
More conversions to come.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134705 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrThumb.td')
-rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 4efe171a42..b9f1a1aabc 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -405,12 +405,6 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in { } } -// FIXME: remove when we have a way to marking a MI with these properties. -let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, - hasExtraDefRegAllocReq = 1 in -def tPOP_RET : tPseudoInst<(outs), (ins pred:$p, reglist:$regs, variable_ops), - Size2Bytes, IIC_iPop_Br, []>; - // All calls clobber the non-callee saved registers. SP is marked as a use to // prevent stack-pointer assignments that appear immediately before calls from // potentially appearing dead. @@ -528,8 +522,8 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1 in { // Just a pseudo for a tBL instruction. Needed to let regalloc know about // the clobber of LR. let Defs = [LR] in - def tBfar : tPseudoInst<(outs), (ins t_bltarget:$target), - Size4Bytes, IIC_Br, []>; + def tBfar : tPseudoExpand<(outs), (ins t_bltarget:$target), + Size4Bytes, IIC_Br, [], (tBL t_bltarget:$target)>; def tBR_JTr : tPseudoInst<(outs), (ins tGPR:$target, i32imm:$jt, i32imm:$id), @@ -1477,3 +1471,12 @@ def tLDRpci_pic : PseudoInst<(outs GPR:$dst), (ins i32imm:$addr, pclabel:$cp), [(set GPR:$dst, (ARMpic_add (load (ARMWrapper tconstpool:$addr)), imm:$cp))]>, Requires<[IsThumb, IsThumb1Only]>; + +// Pseudo-instruction for merged POP and return. +// FIXME: remove when we have a way to marking a MI with these properties. +let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, + hasExtraDefRegAllocReq = 1 in +def tPOP_RET : tPseudoExpand<(outs), (ins pred:$p, reglist:$regs, variable_ops), + Size2Bytes, IIC_iPop_Br, [], + (tPOP pred:$p, reglist:$regs)>; + |