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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-01-18 23:52:19 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-01-18 23:52:19 +0000
commit71f0fc1ca88965b69b4b2c8794a7144bc93d4bba (patch)
tree74d90f8e2fc12215de756277e0b66154c392e64f /lib/Target/ARM/ARMMCInstLower.cpp
parent9cf37e8b48732fccd4c301ed51aafed7074bd84e (diff)
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Ignore register mask operands when lowering instructions to MC.
This is similar to implicit register operands. MC doesn't understand register liveness and call clobbers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148437 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMMCInstLower.cpp')
-rw-r--r--lib/Target/ARM/ARMMCInstLower.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMMCInstLower.cpp b/lib/Target/ARM/ARMMCInstLower.cpp
index daa126def4..a63a94dc76 100644
--- a/lib/Target/ARM/ARMMCInstLower.cpp
+++ b/lib/Target/ARM/ARMMCInstLower.cpp
@@ -107,6 +107,9 @@ bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO,
MCOp = MCOperand::CreateFPImm(Val.convertToDouble());
break;
}
+ case MachineOperand::MO_RegisterMask:
+ // Ignore call clobbers.
+ return false;
}
return true;
}