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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-02-01 23:16:41 +0000 |
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| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-02-01 23:16:41 +0000 |
| commit | b5af2d943ed568f2f4cac545b6dfb150ae9d73aa (patch) | |
| tree | 13a247848babe11f9910bf5aaf5644677723ac60 /lib/Target/ARM/ARMRegisterInfo.td | |
| parent | ebf8c27caea0a1c55df649c78ced28d9fa78093e (diff) | |
| download | llvm-b5af2d943ed568f2f4cac545b6dfb150ae9d73aa.tar.gz llvm-b5af2d943ed568f2f4cac545b6dfb150ae9d73aa.tar.bz2 llvm-b5af2d943ed568f2f4cac545b6dfb150ae9d73aa.tar.xz | |
Specify SubRegIndex components on the index itself.
It is simpler to define a composite index directly:
def ssub_2 : SubRegIndex<[dsub_1, ssub_0]>;
def ssub_3 : SubRegIndex<[dsub_1, ssub_1]>;
Than specifying the composite indices on each register:
CompositeIndices = [(ssub_2 dsub_1, ssub_0),
(ssub_3 dsub_1, ssub_1)] in ...
This also makes it clear that SubRegIndex composition is supposed to be
unique.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149556 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMRegisterInfo.td')
0 files changed, 0 insertions, 0 deletions