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author | Evan Cheng <evan.cheng@apple.com> | 2012-04-11 00:13:00 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2012-04-11 00:13:00 +0000 |
commit | 82509e5c62a99912c636b22e227b810eaf6eda78 (patch) | |
tree | 4c7f36ce001590abdda1adea175a40a34ae0eb7c /lib/Target/ARM/ARMScheduleV6.td | |
parent | 71fbed45d9f4e2e886afc7f22c058087e7872dc6 (diff) | |
download | llvm-82509e5c62a99912c636b22e227b810eaf6eda78.tar.gz llvm-82509e5c62a99912c636b22e227b810eaf6eda78.tar.bz2 llvm-82509e5c62a99912c636b22e227b810eaf6eda78.tar.xz |
Fix a number of problems with ARM fused multiply add/subtract instructions.
1. The new instruction itinerary entries are not properly described.
2. The asm parser can't handle vfms and vfnms.
3. There were no assembler, disassembler test cases.
4. HasNEON2 has the wrong assembler predicate.
rdar://10139676
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154456 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMScheduleV6.td')
-rw-r--r-- | lib/Target/ARM/ARMScheduleV6.td | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMScheduleV6.td b/lib/Target/ARM/ARMScheduleV6.td index 4d959f565e..0ace9bc179 100644 --- a/lib/Target/ARM/ARMScheduleV6.td +++ b/lib/Target/ARM/ARMScheduleV6.td @@ -243,6 +243,12 @@ def ARMV6Itineraries : ProcessorItineraries< // Double-precision FP MAC InstrItinData<IIC_fpMAC64 , [InstrStage<2, [V6_Pipe]>], [9, 2, 2, 2]>, // + // Single-precision Fused FP MAC + InstrItinData<IIC_fpFMAC32, [InstrStage<1, [V6_Pipe]>], [9, 2, 2, 2]>, + // + // Double-precision Fused FP MAC + InstrItinData<IIC_fpFMAC64, [InstrStage<2, [V6_Pipe]>], [9, 2, 2, 2]>, + // // Single-precision FP DIV InstrItinData<IIC_fpDIV32 , [InstrStage<15, [V6_Pipe]>], [20, 2, 2]>, // |