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| author | Evan Cheng <evan.cheng@apple.com> | 2010-10-21 01:12:00 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-21 01:12:00 +0000 |
| commit | d6865de2d205d501e20d312ac66463be57dc44a1 (patch) | |
| tree | 216394c7e7ce15318f375c076d41e8ecde0095a4 /lib/Target/ARM/ARMScheduleV6.td | |
| parent | d7795540d0538fb79e70d0519858d463ac4375af (diff) | |
| download | llvm-d6865de2d205d501e20d312ac66463be57dc44a1.tar.gz llvm-d6865de2d205d501e20d312ac66463be57dc44a1.tar.bz2 llvm-d6865de2d205d501e20d312ac66463be57dc44a1.tar.xz | |
Add missing scheduling itineraries for transfers between core registers and VFP registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116983 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMScheduleV6.td')
| -rw-r--r-- | lib/Target/ARM/ARMScheduleV6.td | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMScheduleV6.td b/lib/Target/ARM/ARMScheduleV6.td index b845130e37..e4e9c13bd9 100644 --- a/lib/Target/ARM/ARMScheduleV6.td +++ b/lib/Target/ARM/ARMScheduleV6.td @@ -247,6 +247,18 @@ def ARMV6Itineraries : ProcessorItineraries< // Double-precision FP SQRT InstrItinData<IIC_fpSQRT64 , [InstrStage<29, [V6_Pipe]>], [34, 2, 2]>, // + // Integer to Single-precision Move + InstrItinData<IIC_fpMOVIS, [InstrStage<1, [V6_Pipe]>], [10, 1]>, + // + // Integer to Double-precision Move + InstrItinData<IIC_fpMOVID, [InstrStage<1, [V6_Pipe]>], [10, 1, 1]>, + // + // Single-precision to Integer Move + InstrItinData<IIC_fpMOVSI, [InstrStage<1, [V6_Pipe]>], [10, 1]>, + // + // Double-precision to Integer Move + InstrItinData<IIC_fpMOVDI, [InstrStage<1, [V6_Pipe]>], [10, 10, 1]>, + // // Single-precision FP Load InstrItinData<IIC_fpLoad32 , [InstrStage<1, [V6_Pipe]>], [5, 2, 2]>, // |