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authorJoey Gouly <joey.gouly@arm.com>2013-06-26 16:58:26 +0000
committerJoey Gouly <joey.gouly@arm.com>2013-06-26 16:58:26 +0000
commit849eedce9921eb8f285cd0df0ad69ee5133459d1 (patch)
tree0ff93bb431162234ff79d7ac320add1aee418058 /lib/Target/ARM/ARMSubtarget.h
parent29acf7e03af9b5524daa1e7523e0296cc766ff24 (diff)
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Add a subtarget feature 'v8' to the ARM backend.
This allows for targeting the ARMv8 AArch32 variant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184967 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMSubtarget.h')
-rw-r--r--lib/Target/ARM/ARMSubtarget.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h
index bc5af96c60..ad9c0d042e 100644
--- a/lib/Target/ARM/ARMSubtarget.h
+++ b/lib/Target/ARM/ARMSubtarget.h
@@ -37,7 +37,8 @@ protected:
/// ARMProcFamily - ARM processor family: Cortex-A8, Cortex-A9, and others.
ARMProcFamilyEnum ARMProcFamily;
- /// HasV4TOps, HasV5TOps, HasV5TEOps, HasV6Ops, HasV6T2Ops, HasV7Ops -
+ /// HasV4TOps, HasV5TOps, HasV5TEOps,
+ /// HasV6Ops, HasV6T2Ops, HasV7Ops, HasV8Ops -
/// Specify whether target support specific ARM ISA variants.
bool HasV4TOps;
bool HasV5TOps;
@@ -45,6 +46,7 @@ protected:
bool HasV6Ops;
bool HasV6T2Ops;
bool HasV7Ops;
+ bool HasV8Ops;
/// HasVFPv2, HasVFPv3, HasVFPv4, HasNEON - Specify what
/// floating point ISAs are supported.
@@ -231,6 +233,7 @@ public:
bool hasV6Ops() const { return HasV6Ops; }
bool hasV6T2Ops() const { return HasV6T2Ops; }
bool hasV7Ops() const { return HasV7Ops; }
+ bool hasV8Ops() const { return HasV8Ops; }
bool isCortexA5() const { return ARMProcFamily == CortexA5; }
bool isCortexA8() const { return ARMProcFamily == CortexA8; }