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author | Tim Northover <tnorthover@apple.com> | 2013-10-07 11:10:47 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2013-10-07 11:10:47 +0000 |
commit | cf3e4cb29a5fd485f11354060bb7a99e8cfdaf09 (patch) | |
tree | 9d2dde8a3a23df35f617e28ab1e8a04e099f2620 /lib/Target/ARM/ARMSubtarget.h | |
parent | ae06a63be5a1279739e0c8a2006e72f4bc687d57 (diff) | |
download | llvm-cf3e4cb29a5fd485f11354060bb7a99e8cfdaf09.tar.gz llvm-cf3e4cb29a5fd485f11354060bb7a99e8cfdaf09.tar.bz2 llvm-cf3e4cb29a5fd485f11354060bb7a99e8cfdaf09.tar.xz |
ARM: allow cortex-m0 to use hint instructions
The hint instructions ("nop", "yield", etc) are mostly Thumb2-only, but have
been ported across to the v6M architecture. Fortunately, v6M seems to sit
nicely between v6 (thumb-1 only) and v6T2, so we can add a feature for it
fairly easily.
rdar://problem/15144406
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192097 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMSubtarget.h')
-rw-r--r-- | lib/Target/ARM/ARMSubtarget.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h index 11d8e8e6d6..7c7e402036 100644 --- a/lib/Target/ARM/ARMSubtarget.h +++ b/lib/Target/ARM/ARMSubtarget.h @@ -44,12 +44,13 @@ protected: ARMProcClassEnum ARMProcClass; /// HasV4TOps, HasV5TOps, HasV5TEOps, - /// HasV6Ops, HasV6T2Ops, HasV7Ops, HasV8Ops - + /// HasV6Ops, HasV6MOps, HasV6T2Ops, HasV7Ops, HasV8Ops - /// Specify whether target support specific ARM ISA variants. bool HasV4TOps; bool HasV5TOps; bool HasV5TEOps; bool HasV6Ops; + bool HasV6MOps; bool HasV6T2Ops; bool HasV7Ops; bool HasV8Ops; |