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| author | Owen Anderson <resistor@mac.com> | 2011-08-22 18:22:06 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-08-22 18:22:06 +0000 |
| commit | f1c8e3e70e222365b84f4cb7e87396ee85820711 (patch) | |
| tree | da4e9cc7d89bb777fe47a62585dce9ebf5e6b06d /lib/Target/ARM/Disassembler | |
| parent | 88b7ccc7f0666fac2564518504a71ee471e62d82 (diff) | |
| download | llvm-f1c8e3e70e222365b84f4cb7e87396ee85820711.tar.gz llvm-f1c8e3e70e222365b84f4cb7e87396ee85820711.tar.bz2 llvm-f1c8e3e70e222365b84f4cb7e87396ee85820711.tar.xz | |
Correct writeback handling of duplicating VLD instructions. Discovered by randomized testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138251 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index ebcb798969..725a8a2abd 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -1992,7 +1992,7 @@ static DecodeStatus DecodeVLD1DupInstruction(llvm::MCInst &Inst, unsigned Insn, if (regs == 2) { CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder)); } - if (Rm == 0xD) { + if (Rm != 0xF) { CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)); } @@ -2023,7 +2023,7 @@ static DecodeStatus DecodeVLD2DupInstruction(llvm::MCInst &Inst, unsigned Insn, CHECK(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)); CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)); - if (Rm == 0xD) { + if (Rm != 0xF) { CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)); } @@ -2052,7 +2052,7 @@ static DecodeStatus DecodeVLD3DupInstruction(llvm::MCInst &Inst, unsigned Insn, CHECK(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)); CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)); CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder)); - if (Rm == 0xD) { + if (Rm != 0xF) { CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)); } @@ -2097,7 +2097,7 @@ static DecodeStatus DecodeVLD4DupInstruction(llvm::MCInst &Inst, unsigned Insn, CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)); CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder)); CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+3*inc)%32, Address, Decoder)); - if (Rm == 0xD) { + if (Rm != 0xF) { CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)); } |