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authorJim Grosbach <grosbach@apple.com>2011-06-30 22:10:46 +0000
committerJim Grosbach <grosbach@apple.com>2011-06-30 22:10:46 +0000
commit63b46faeb8acae9b7e5f865b7417dc00b9b9dad3 (patch)
tree9dd91095e265db1ecbefc5b968d2f0ee04a7fdc0 /lib/Target/ARM/Thumb1InstrInfo.cpp
parent2541c41f3e2af94585e14353a91f02facd65e415 (diff)
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Thumb1 register to register MOV instruction is predicable.
Fix a FIXME and allow predication (in Thumb2) for the T1 register to register MOV instructions. This allows some better codegen with if-conversion (as seen in the test updates), plus it lays the groundwork for pseudo-izing the tMOVCC instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134197 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Thumb1InstrInfo.cpp')
-rw-r--r--lib/Target/ARM/Thumb1InstrInfo.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/Thumb1InstrInfo.cpp b/lib/Target/ARM/Thumb1InstrInfo.cpp
index e5d3a89dab..614ba816b1 100644
--- a/lib/Target/ARM/Thumb1InstrInfo.cpp
+++ b/lib/Target/ARM/Thumb1InstrInfo.cpp
@@ -46,8 +46,8 @@ void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
else if (tDest)
Opc = ARM::tMOVgpr2tgpr;
- BuildMI(MBB, I, DL, get(Opc), DestReg)
- .addReg(SrcReg, getKillRegState(KillSrc));
+ AddDefaultPred(BuildMI(MBB, I, DL, get(Opc), DestReg)
+ .addReg(SrcReg, getKillRegState(KillSrc)));
assert(ARM::GPRRegClass.contains(DestReg, SrcReg) &&
"Thumb1 can only copy GPR registers");
}