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author | Jim Grosbach <grosbach@apple.com> | 2011-08-24 17:46:13 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2011-08-24 17:46:13 +0000 |
commit | 5b81584f7403ffdb9cc6babaaeb0411c080e0f81 (patch) | |
tree | 6f24c77253dbee60cb277956807ca71d2ff707f7 /lib/Target/ARM/Thumb2InstrInfo.cpp | |
parent | e234d02204e0e546c3555e7e894b8521d22a2121 (diff) | |
download | llvm-5b81584f7403ffdb9cc6babaaeb0411c080e0f81.tar.gz llvm-5b81584f7403ffdb9cc6babaaeb0411c080e0f81.tar.bz2 llvm-5b81584f7403ffdb9cc6babaaeb0411c080e0f81.tar.xz |
Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.
Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138445 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Thumb2InstrInfo.cpp')
-rw-r--r-- | lib/Target/ARM/Thumb2InstrInfo.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp index bc104ebc78..cf040c822d 100644 --- a/lib/Target/ARM/Thumb2InstrInfo.cpp +++ b/lib/Target/ARM/Thumb2InstrInfo.cpp @@ -235,9 +235,8 @@ void llvm::emitT2RegPlusImmediate(MachineBasicBlock &MBB, if (DestReg == ARM::SP && (ThisVal < ((1 << 7)-1) * 4)) { assert((ThisVal & 3) == 0 && "Stack update is not multiple of 4?"); Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; - // FIXME: Fix Thumb1 immediate encoding. - BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg) - .addReg(BaseReg).addImm(ThisVal/4).setMIFlags(MIFlags); + AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg) + .addReg(BaseReg).addImm(ThisVal/4).setMIFlags(MIFlags)); NumBytes = 0; continue; } |