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author | Tim Northover <tnorthover@apple.com> | 2014-03-29 10:18:08 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2014-03-29 10:18:08 +0000 |
commit | 7b837d8c75f78fe55c9b348b9ec2281169a48d2a (patch) | |
tree | e8e01e73cf4d0723a13e49e4b5d8a66f896d184f /lib/Target/ARM64/CMakeLists.txt | |
parent | 69bd9577fc423edea13479eaacf7b1844faa6c6a (diff) | |
download | llvm-7b837d8c75f78fe55c9b348b9ec2281169a48d2a.tar.gz llvm-7b837d8c75f78fe55c9b348b9ec2281169a48d2a.tar.bz2 llvm-7b837d8c75f78fe55c9b348b9ec2281169a48d2a.tar.xz |
ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.
Everything will be easier with the target in-tree though, hence this
commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM64/CMakeLists.txt')
-rw-r--r-- | lib/Target/ARM64/CMakeLists.txt | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/lib/Target/ARM64/CMakeLists.txt b/lib/Target/ARM64/CMakeLists.txt new file mode 100644 index 0000000000..6de861cc76 --- /dev/null +++ b/lib/Target/ARM64/CMakeLists.txt @@ -0,0 +1,50 @@ +set(LLVM_TARGET_DEFINITIONS ARM64.td) + +tablegen(LLVM ARM64GenRegisterInfo.inc -gen-register-info) +tablegen(LLVM ARM64GenInstrInfo.inc -gen-instr-info) +tablegen(LLVM ARM64GenMCCodeEmitter.inc -gen-emitter -mc-emitter) +tablegen(LLVM ARM64GenMCPseudoLowering.inc -gen-pseudo-lowering) +tablegen(LLVM ARM64GenAsmWriter.inc -gen-asm-writer) +tablegen(LLVM ARM64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1) +tablegen(LLVM ARM64GenAsmMatcher.inc -gen-asm-matcher) +tablegen(LLVM ARM64GenDAGISel.inc -gen-dag-isel) +tablegen(LLVM ARM64GenFastISel.inc -gen-fast-isel) +tablegen(LLVM ARM64GenCallingConv.inc -gen-callingconv) +tablegen(LLVM ARM64GenSubtargetInfo.inc -gen-subtarget) +tablegen(LLVM ARM64GenDisassemblerTables.inc -gen-disassembler) +add_public_tablegen_target(ARM64CommonTableGen) + +add_llvm_target(ARM64CodeGen + ARM64AddressTypePromotion.cpp + ARM64AdvSIMDScalarPass.cpp + ARM64AsmPrinter.cpp + ARM64BranchRelaxation.cpp + ARM64CleanupLocalDynamicTLSPass.cpp + ARM64CollectLOH.cpp + ARM64ConditionalCompares.cpp + ARM64DeadRegisterDefinitionsPass.cpp + ARM64ExpandPseudoInsts.cpp + ARM64FastISel.cpp + ARM64FrameLowering.cpp + ARM64ISelDAGToDAG.cpp + ARM64ISelLowering.cpp + ARM64InstrInfo.cpp + ARM64LoadStoreOptimizer.cpp + ARM64MCInstLower.cpp + ARM64PromoteConstant.cpp + ARM64RegisterInfo.cpp + ARM64SelectionDAGInfo.cpp + ARM64StorePairSuppress.cpp + ARM64Subtarget.cpp + ARM64TargetMachine.cpp + ARM64TargetObjectFile.cpp + ARM64TargetTransformInfo.cpp +) + +add_dependencies(LLVMARM64CodeGen intrinsics_gen) + +add_subdirectory(TargetInfo) +add_subdirectory(AsmParser) +add_subdirectory(Disassembler) +add_subdirectory(InstPrinter) +add_subdirectory(MCTargetDesc) |